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Add Intel Raptor Lake uarch detection (#283)
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@ -161,6 +161,7 @@ typedef enum {
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INTEL_SPR, // SAPPHIRE RAPIDS
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INTEL_SPR, // SAPPHIRE RAPIDS
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INTEL_ADL, // ALDER LAKE
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INTEL_ADL, // ALDER LAKE
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INTEL_RCL, // ROCKET LAKE
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INTEL_RCL, // ROCKET LAKE
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INTEL_RPL, // RAPTOR LAKE
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INTEL_KNIGHTS_M, // KNIGHTS MILL
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INTEL_KNIGHTS_M, // KNIGHTS MILL
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INTEL_KNIGHTS_L, // KNIGHTS LANDING
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INTEL_KNIGHTS_L, // KNIGHTS LANDING
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INTEL_KNIGHTS_F, // KNIGHTS FERRY
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INTEL_KNIGHTS_F, // KNIGHTS FERRY
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@ -581,6 +581,9 @@ X86Microarchitecture GetX86Microarchitecture(const X86Info* info) {
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case CPUID(0x06, 0xA7):
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case CPUID(0x06, 0xA7):
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// https://en.wikichip.org/wiki/intel/microarchitectures/rocket_lake
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// https://en.wikichip.org/wiki/intel/microarchitectures/rocket_lake
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return INTEL_RCL;
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return INTEL_RCL;
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case CPUID(0x06, 0xB7):
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// https://en.wikichip.org/wiki/intel/microarchitectures/raptor_lake
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return INTEL_RPL;
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case CPUID(0x06, 0x85):
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case CPUID(0x06, 0x85):
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// https://en.wikichip.org/wiki/intel/microarchitectures/knights_mill
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// https://en.wikichip.org/wiki/intel/microarchitectures/knights_mill
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return INTEL_KNIGHTS_M;
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return INTEL_KNIGHTS_M;
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@ -1948,6 +1951,7 @@ CacheInfo GetX86CacheInfo(void) {
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LINE(INTEL_SPR) \
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LINE(INTEL_SPR) \
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LINE(INTEL_ADL) \
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LINE(INTEL_ADL) \
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LINE(INTEL_RCL) \
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LINE(INTEL_RCL) \
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LINE(INTEL_RPL) \
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LINE(INTEL_KNIGHTS_M) \
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LINE(INTEL_KNIGHTS_M) \
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LINE(INTEL_KNIGHTS_L) \
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LINE(INTEL_KNIGHTS_L) \
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LINE(INTEL_KNIGHTS_F) \
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LINE(INTEL_KNIGHTS_F) \
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@ -1610,6 +1610,20 @@ TEST_F(CpuidX86Test, INTEL_ATOM_TMT_JASPER_LAKE) {
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EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_ATOM_TMT);
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EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_ATOM_TMT);
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}
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}
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// http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00B0671_RaptorLake_02_CPUID.txt
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TEST_F(CpuidX86Test, INTEL_RAPTOR_LAKE) {
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cpu().SetLeaves({
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{{0x00000000, 0}, Leaf{0x00000020, 0x756E6547, 0x6C65746E, 0x49656E69}},
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{{0x00000001, 0}, Leaf{0x000B0671, 0x00800800, 0x7FFAFBBF, 0xBFEBFBFF}},
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});
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const auto info = GetX86Info();
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EXPECT_STREQ(info.vendor, CPU_FEATURES_VENDOR_GENUINE_INTEL);
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EXPECT_EQ(info.family, 0x06);
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EXPECT_EQ(info.model, 0xB7);
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EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_RPL);
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}
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// http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00306F2_HaswellEP2_CPUID.txt
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// http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00306F2_HaswellEP2_CPUID.txt
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TEST_F(CpuidX86Test, INTEL_HASWELL_LZCNT) {
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TEST_F(CpuidX86Test, INTEL_HASWELL_LZCNT) {
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cpu().SetLeaves({
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cpu().SetLeaves({
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