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mirror of https://github.com/google/cpu_features.git synced 2025-04-28 15:33:37 +02:00

Change feature variables to unsigned int to fully comply with 'true' and 'false' & IsBitSet()

It seems that ' : 1' alignments cause signed integers to be either -1 or 0. While -1 is true and 0 is false reverse might not be always correct when true is defined 1.

Maybe change feature variables to bool ?
This commit is contained in:
fuzun 2018-08-30 06:11:35 +03:00
parent 26133d3b62
commit 319bd6f26b
5 changed files with 93 additions and 93 deletions

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@ -20,13 +20,13 @@
CPU_FEATURES_START_CPP_NAMESPACE CPU_FEATURES_START_CPP_NAMESPACE
typedef struct { typedef struct {
int fp : 1; // Floating-point. unsigned int fp : 1; // Floating-point.
int asimd : 1; // Advanced SIMD. unsigned int asimd : 1; // Advanced SIMD.
int aes : 1; // Hardware-accelerated Advanced Encryption Standard. unsigned int aes : 1; // Hardware-accelerated Advanced Encryption Standard.
int pmull : 1; // Polynomial multiply long. unsigned int pmull : 1; // Polynomial multiply long.
int sha1 : 1; // Hardware-accelerated SHA1. unsigned int sha1 : 1; // Hardware-accelerated SHA1.
int sha2 : 1; // Hardware-accelerated SHA2-256. unsigned int sha2 : 1; // Hardware-accelerated SHA2-256.
int crc32 : 1; // Hardware-accelerated CRC-32. unsigned int crc32 : 1; // Hardware-accelerated CRC-32.
// Make sure to update Aarch64FeaturesEnum below if you add a field here. // Make sure to update Aarch64FeaturesEnum below if you add a field here.
} Aarch64Features; } Aarch64Features;

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@ -20,19 +20,19 @@
CPU_FEATURES_START_CPP_NAMESPACE CPU_FEATURES_START_CPP_NAMESPACE
typedef struct { typedef struct {
int vfp : 1; // Vector Floating Point. unsigned int vfp : 1; // Vector Floating Point.
int iwmmxt : 1; // Intel Wireless MMX Technology. unsigned int iwmmxt : 1; // Intel Wireless MMX Technology.
int neon : 1; // Advanced SIMD. unsigned int neon : 1; // Advanced SIMD.
int vfpv3 : 1; // VFP version 3 unsigned int vfpv3 : 1; // VFP version 3
int vfpv3d16 : 1; // VFP version 3 with 16 D-registers unsigned int vfpv3d16 : 1; // VFP version 3 with 16 D-registers
int vfpv4 : 1; // VFP version 4 with fast context switching unsigned int vfpv4 : 1; // VFP version 4 with fast context switching
int idiva : 1; // SDIV and UDIV hardware division in ARM mode. unsigned int idiva : 1; // SDIV and UDIV hardware division in ARM mode.
int idivt : 1; // SDIV and UDIV hardware division in Thumb mode. unsigned int idivt : 1; // SDIV and UDIV hardware division in Thumb mode.
int aes : 1; // Hardware-accelerated Advanced Encryption Standard. unsigned int aes : 1; // Hardware-accelerated Advanced Encryption Standard.
int pmull : 1; // Polynomial multiply long. unsigned int pmull : 1; // Polynomial multiply long.
int sha1 : 1; // Hardware-accelerated SHA1. unsigned int sha1 : 1; // Hardware-accelerated SHA1.
int sha2 : 1; // Hardware-accelerated SHA2-256. unsigned int sha2 : 1; // Hardware-accelerated SHA2-256.
int crc32 : 1; // Hardware-accelerated CRC-32. unsigned int crc32 : 1; // Hardware-accelerated CRC-32.
// Make sure to update ArmFeaturesEnum below if you add a field here. // Make sure to update ArmFeaturesEnum below if you add a field here.
} ArmFeatures; } ArmFeatures;

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@ -20,9 +20,9 @@
CPU_FEATURES_START_CPP_NAMESPACE CPU_FEATURES_START_CPP_NAMESPACE
typedef struct { typedef struct {
int msa : 1; // MIPS SIMD Architecture unsigned int msa : 1; // MIPS SIMD Architecture
// https://www.mips.com/products/architectures/ase/simd/ // https://www.mips.com/products/architectures/ase/simd/
int eva : 1; // Enhanced Virtual Addressing unsigned int eva : 1; // Enhanced Virtual Addressing
// https://www.mips.com/products/architectures/mips64/ // https://www.mips.com/products/architectures/mips64/
// Make sure to update MipsFeaturesEnum below if you add a field here. // Make sure to update MipsFeaturesEnum below if you add a field here.

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@ -21,47 +21,47 @@
CPU_FEATURES_START_CPP_NAMESPACE CPU_FEATURES_START_CPP_NAMESPACE
typedef struct { typedef struct {
int ppc32 : 1; unsigned int ppc32 : 1;
int ppc64 : 1; unsigned int ppc64 : 1;
int ppc601 : 1; unsigned int ppc601 : 1;
int altivec : 1; unsigned int altivec : 1;
int fpu : 1; unsigned int fpu : 1;
int mmu : 1; unsigned int mmu : 1;
int mac_4xx : 1; unsigned int mac_4xx : 1;
int unifiedcache : 1; unsigned int unifiedcache : 1;
int spe : 1; unsigned int spe : 1;
int efpsingle : 1; unsigned int efpsingle : 1;
int efpdouble : 1; unsigned int efpdouble : 1;
int no_tb : 1; unsigned int no_tb : 1;
int power4 : 1; unsigned int power4 : 1;
int power5 : 1; unsigned int power5 : 1;
int power5plus : 1; unsigned int power5plus : 1;
int cell : 1; unsigned int cell : 1;
int booke : 1; unsigned int booke : 1;
int smt : 1; unsigned int smt : 1;
int icachesnoop : 1; unsigned int icachesnoop : 1;
int arch205 : 1; unsigned int arch205 : 1;
int pa6t : 1; unsigned int pa6t : 1;
int dfp : 1; unsigned int dfp : 1;
int power6ext : 1; unsigned int power6ext : 1;
int arch206 : 1; unsigned int arch206 : 1;
int vsx : 1; unsigned int vsx : 1;
int pseries_perfmon_compat : 1; unsigned int pseries_perfmon_compat : 1;
int truele : 1; unsigned int truele : 1;
int ppcle : 1; unsigned int ppcle : 1;
int arch207 : 1; unsigned int arch207 : 1;
int htm : 1; unsigned int htm : 1;
int dscr : 1; unsigned int dscr : 1;
int ebb : 1; unsigned int ebb : 1;
int isel : 1; unsigned int isel : 1;
int tar : 1; unsigned int tar : 1;
int vcrypto : 1; unsigned int vcrypto : 1;
int htm_nosc : 1; unsigned int htm_nosc : 1;
int arch300 : 1; unsigned int arch300 : 1;
int ieee128 : 1; unsigned int ieee128 : 1;
int darn : 1; unsigned int darn : 1;
int scv : 1; unsigned int scv : 1;
int htm_no_suspend : 1; unsigned int htm_no_suspend : 1;
// Make sure to update PPCFeaturesEnum below if you add a field here. // Make sure to update PPCFeaturesEnum below if you add a field here.
} PPCFeatures; } PPCFeatures;

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@ -21,40 +21,40 @@ CPU_FEATURES_START_CPP_NAMESPACE
// See https://en.wikipedia.org/wiki/CPUID for a list of x86 cpu features. // See https://en.wikipedia.org/wiki/CPUID for a list of x86 cpu features.
typedef struct { typedef struct {
int aes : 1; unsigned int aes : 1;
int erms : 1; unsigned int erms : 1;
int f16c : 1; unsigned int f16c : 1;
int fma3 : 1; unsigned int fma3 : 1;
int vpclmulqdq : 1; unsigned int vpclmulqdq : 1;
int bmi1 : 1; unsigned int bmi1 : 1;
int bmi2 : 1; unsigned int bmi2 : 1;
int ssse3 : 1; unsigned int ssse3 : 1;
int sse4_1 : 1; unsigned int sse4_1 : 1;
int sse4_2 : 1; unsigned int sse4_2 : 1;
int avx : 1; unsigned int avx : 1;
int avx2 : 1; unsigned int avx2 : 1;
int avx512f : 1; unsigned int avx512f : 1;
int avx512cd : 1; unsigned int avx512cd : 1;
int avx512er : 1; unsigned int avx512er : 1;
int avx512pf : 1; unsigned int avx512pf : 1;
int avx512bw : 1; unsigned int avx512bw : 1;
int avx512dq : 1; unsigned int avx512dq : 1;
int avx512vl : 1; unsigned int avx512vl : 1;
int avx512ifma : 1; unsigned int avx512ifma : 1;
int avx512vbmi : 1; unsigned int avx512vbmi : 1;
int avx512vbmi2 : 1; unsigned int avx512vbmi2 : 1;
int avx512vnni : 1; unsigned int avx512vnni : 1;
int avx512bitalg : 1; unsigned int avx512bitalg : 1;
int avx512vpopcntdq : 1; unsigned int avx512vpopcntdq : 1;
int avx512_4vnniw : 1; unsigned int avx512_4vnniw : 1;
int avx512_4vbmi2 : 1; unsigned int avx512_4vbmi2 : 1;
int smx : 1; unsigned int smx : 1;
int sgx : 1; unsigned int sgx : 1;
int cx16 : 1; // aka. CMPXCHG16B unsigned int cx16 : 1; // aka. CMPXCHG16B
// Make sure to update X86FeaturesEnum below if you add a field here. // Make sure to update X86FeaturesEnum below if you add a field here.
} X86Features; } X86Features;