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powerpc: Added PowerPC implementation
Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
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Rashmica Gupta
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Rashmica Gupta
Rashmica Gupta
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139
include/cpuinfo_ppc.h
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139
include/cpuinfo_ppc.h
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// Copyright 2018 IBM
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef CPU_FEATURES_INCLUDE_CPUINFO_PPC_H_
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#define CPU_FEATURES_INCLUDE_CPUINFO_PPC_H_
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#include "cpu_features_macros.h"
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CPU_FEATURES_START_CPP_NAMESPACE
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typedef struct {
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int ppc32 : 1;
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int ppc64 : 1;
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int ppc601 : 1;
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int altivec : 1;
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int fpu : 1;
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int mmu : 1;
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int mac_4xx : 1;
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int unifiedcache : 1;
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int spe : 1;
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int efpsingle : 1;
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int efpdouble : 1;
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int no_tb : 1;
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int power4 : 1;
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int power5 : 1;
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int power5plus : 1;
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int cell : 1;
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int booke : 1;
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int smt : 1;
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int icachesnoop : 1;
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int arch205 : 1;
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int pa6t : 1;
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int dfp : 1;
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int power6ext : 1;
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int arch206 : 1;
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int vsx : 1;
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int pseries_perfmon_compat : 1;
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int truele : 1;
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int ppcle : 1;
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int arch207 : 1;
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int htm : 1;
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int dscr : 1;
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int ebb : 1;
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int isel : 1;
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int tar : 1;
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int vcrypto : 1;
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int htm_nosc : 1;
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int arch300 : 1;
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int ieee128 : 1;
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int darn : 1;
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int scv : 1;
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int htm_no_suspend : 1;
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// Make sure to update PPCFeaturesEnum below if you add a field here.
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} PPCFeatures;
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typedef struct {
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PPCFeatures features;
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} PPCInfo;
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// This function is guaranteed to be malloc, memset and memcpy free.
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PPCInfo GetPPCInfo(void);
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typedef struct {
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char platform[64]; // 0 terminated string
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char model[64]; // 0 terminated string
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char machine[64]; // 0 terminated string
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char cpu[64]; // 0 terminated string
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} PPCPlatformStrings;
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PPCPlatformStrings GetPPCPlatformStrings(void);
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////////////////////////////////////////////////////////////////////////////////
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// Introspection functions
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typedef enum {
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PPC_32, /* 32 bit mode execution */
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PPC_64, /* 64 bit mode execution */
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PPC_601_INSTR, /* Old POWER ISA */
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PPC_HAS_ALTIVEC, /* SIMD Unit*/
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PPC_HAS_FPU, /* Floating Point Unit */
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PPC_HAS_MMU, /* Memory management unit */
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PPC_HAS_4xxMAC,
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PPC_UNIFIED_CACHE, /* Unified instruction and data cache */
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PPC_HAS_SPE, /* Signal processing extention unit */
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PPC_HAS_EFP_SINGLE, /* SPE single precision fpu */
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PPC_HAS_EFP_DOUBLE, /* SPE double precision fpu */
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PPC_NO_TB, /* No timebase */
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PPC_POWER4,
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PPC_POWER5,
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PPC_POWER5_PLUS,
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PPC_CELL, /* Cell broadband engine */
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PPC_BOOKE, /* Embedded ISA */
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PPC_SMT, /* Simultaneous multi-threading */
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PPC_ICACHE_SNOOP,
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PPC_ARCH_2_05, /* ISA 2.05 - POWER6 */
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PPC_PA6T, /* PA Semi 6T core ISA */
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PPC_HAS_DFP, /* Decimal floating point unit */
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PPC_POWER6_EXT,
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PPC_ARCH_2_06, /* ISA 2.06 - POWER7 */
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PPC_HAS_VSX, /* Vector-scalar extension */
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PPC_PSERIES_PERFMON_COMPAT, /* Set of backwards compatibile performance
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monitoring events */
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PPC_TRUE_LE,
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PPC_PPC_LE,
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PPC_ARCH_2_07, /* ISA 2.07 - POWER8 */
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PPC_HTM, /* Hardware Transactional Memory */
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PPC_DSCR, /* Data stream control register */
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PPC_EBB, /* Event base branching */
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PPC_ISEL, /* Integer select instructions */
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PPC_TAR, /* Target address register */
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PPC_VEC_CRYPTO, /* Vector cryptography instructions */
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PPC_HTM_NOSC, /* Transactions aborted when syscall made*/
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PPC_ARCH_3_00, /* ISA 3.00 - POWER9 */
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PPC_HAS_IEEE128, /* VSX IEEE Binary Float 128-bit */
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PPC_DARN, /* Deliver a random number instruction */
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PPC_SCV, /* scv syscall */
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PPC_HTM_NO_SUSPEND, /* TM w/out suspended state */
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PPC_LAST_,
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} PPCFeaturesEnum;
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int GetPPCFeaturesEnumValue(const PPCFeatures* features, PPCFeaturesEnum value);
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const char* GetPPCFeaturesEnumName(PPCFeaturesEnum);
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CPU_FEATURES_END_CPP_NAMESPACE
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#endif // CPU_FEATURES_INCLUDE_CPUINFO_PPC_H_
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