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add intel goldmont plus (#256)

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* add intel goldmont plus (INTEL_ATOM_GMT_PLUS)
This commit is contained in:
Andrei Kurushin
2022-08-08 10:27:18 +03:00
committed by GitHub
parent 876b9e6a73
commit 4e8d2e3a22
3 changed files with 20 additions and 0 deletions
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1
include/cpuinfo_x86.h
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@ -140,6 +140,7 @@ typedef enum {
INTEL_BDW, // BROADWELL INTEL_BDW, // BROADWELL
INTEL_SKL, // SKYLAKE INTEL_SKL, // SKYLAKE
INTEL_ATOM_GMT, // GOLDMONT INTEL_ATOM_GMT, // GOLDMONT
INTEL_ATOM_GMT_PLUS, // GOLDMONT+
INTEL_ATOM_TMT, // TREMONT INTEL_ATOM_TMT, // TREMONT
INTEL_KBL, // KABY LAKE INTEL_KBL, // KABY LAKE
INTEL_CFL, // COFFEE LAKE INTEL_CFL, // COFFEE LAKE

4
src/impl_x86__base_implementation.inl
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@ -466,6 +466,9 @@ X86Microarchitecture GetX86Microarchitecture(const X86Info* info) {
case CPUID(0x06, 0x5C): case CPUID(0x06, 0x5C):
// https://en.wikipedia.org/wiki/Goldmont // https://en.wikipedia.org/wiki/Goldmont
return INTEL_ATOM_GMT; return INTEL_ATOM_GMT;
case CPUID(0x06, 0x7A):
// https://en.wikichip.org/wiki/intel/microarchitectures/goldmont_plus
return INTEL_ATOM_GMT_PLUS;
case CPUID(0x06, 0x8A): case CPUID(0x06, 0x8A):
case CPUID(0x06, 0x96): case CPUID(0x06, 0x96):
case CPUID(0x06, 0x9C): case CPUID(0x06, 0x9C):
@ -1795,6 +1798,7 @@ CacheInfo GetX86CacheInfo(void) {
LINE(INTEL_BDW) \ LINE(INTEL_BDW) \
LINE(INTEL_SKL) \ LINE(INTEL_SKL) \
LINE(INTEL_ATOM_GMT) \ LINE(INTEL_ATOM_GMT) \
LINE(INTEL_ATOM_GMT_PLUS) \
LINE(INTEL_ATOM_TMT) \ LINE(INTEL_ATOM_TMT) \
LINE(INTEL_KBL) \ LINE(INTEL_KBL) \
LINE(INTEL_CFL) \ LINE(INTEL_CFL) \

15
test/cpuinfo_x86_test.cc
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@ -1169,6 +1169,21 @@ TEST_F(CpuidX86Test, INTEL_LAKEMONT) {
X86Microarchitecture::INTEL_LAKEMONT); X86Microarchitecture::INTEL_LAKEMONT);
} }
// https://github.com/InstLatx64/InstLatx64/blob/master/GenuineIntel/GenuineIntel00706A8_GoldmontPlus_CPUID.txt
TEST_F(CpuidX86Test, INTEL_GOLDMONT_PLUS) {
cpu().SetLeaves({
{{0x00000000, 0}, Leaf{0x00000018, 0x756E6547, 0x6c65746E, 0x49656E69}},
{{0x00000001, 0}, Leaf{0x000706A8, 0x00400800, 0x4FF8EBBF, 0xBFEBFBFF}},
});
const auto info = GetX86Info();
EXPECT_STREQ(info.vendor, CPU_FEATURES_VENDOR_GENUINE_INTEL);
EXPECT_EQ(info.family, 0x06);
EXPECT_EQ(info.model, 0x7A);
EXPECT_EQ(GetX86Microarchitecture(&info),
X86Microarchitecture::INTEL_ATOM_GMT_PLUS);
}
// https://github.com/InstLatx64/InstLatx64/blob/master/GenuineIntel/GenuineIntel0050670_KnightsLanding_CPUID.txt // https://github.com/InstLatx64/InstLatx64/blob/master/GenuineIntel/GenuineIntel0050670_KnightsLanding_CPUID.txt
TEST_F(CpuidX86Test, INTEL_KNIGHTS_LANDING) { TEST_F(CpuidX86Test, INTEL_KNIGHTS_LANDING) {
cpu().SetLeaves({ cpu().SetLeaves({