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https://github.com/google/cpu_features.git
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[NFC] clang-format the code base
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@ -26,7 +26,7 @@ CPU_FEATURES_START_CPP_NAMESPACE
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typedef struct {
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// Base
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int CPUCFG : 1; // Instruction for Identify CPU Features
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int CPUCFG : 1; // Instruction for Identify CPU Features
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// Extension
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int LAM : 1; // Extension for Atomic Memory Access Instructions
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@ -36,7 +36,8 @@ typedef struct {
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int LASX : 1; // Extension for Loongson Advanced SIMD eXtension
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int CRC32 : 1; // Extension for Cyclic Redundancy Check Instructions
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int COMPLEX : 1; // Extension for Complex Vector Operation Instructions
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int CRYPTO : 1; // Extension for Encryption And Decryption Vector Instructions
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int CRYPTO : 1; // Extension for Encryption And Decryption Vector
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// Instructions
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int LVZ : 1; // Extension for Virtualization
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int LBT_X86 : 1; // Extension for X86 Binary Translation Extension
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int LBT_ARM : 1; // Extension for ARM Binary Translation Extension
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@ -69,7 +70,7 @@ typedef enum {
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LoongArchInfo GetLoongArchInfo(void);
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int GetLoongArchFeaturesEnumValue(const LoongArchFeatures* features,
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LoongArchFeaturesEnum value);
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LoongArchFeaturesEnum value);
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const char* GetLoongArchFeaturesEnumName(LoongArchFeaturesEnum);
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CPU_FEATURES_END_CPP_NAMESPACE
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@ -21,20 +21,20 @@
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CPU_FEATURES_START_CPP_NAMESPACE
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typedef struct {
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int msa : 1; // MIPS SIMD Architecture
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// https://www.mips.com/products/architectures/ase/simd/
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int eva : 1; // Enhanced Virtual Addressing
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// https://www.mips.com/products/architectures/mips64/
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int r6 : 1; // True if is release 6 of the processor.
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int mips16 : 1; // Compressed instructions
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int mdmx : 1; // MIPS Digital Media Extension
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int mips3d : 1; // 3D graphics acceleration
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// MIPS(r) Architecture for Programmers, Volume IV-c
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int smart : 1; // Smart-card cryptography
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// MIPS(r) Architecture for Programmers, Volume IV-d
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int dsp : 1; // Digital Signal Processing
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// MIPS(r) Architecture for Programmers, Volume IV-e
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// https://www.mips.com/products/architectures/ase/dsp/
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int msa : 1; // MIPS SIMD Architecture
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// https://www.mips.com/products/architectures/ase/simd/
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int eva : 1; // Enhanced Virtual Addressing
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// https://www.mips.com/products/architectures/mips64/
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int r6 : 1; // True if is release 6 of the processor.
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int mips16 : 1; // Compressed instructions
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int mdmx : 1; // MIPS Digital Media Extension
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int mips3d : 1; // 3D graphics acceleration
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// MIPS(r) Architecture for Programmers, Volume IV-c
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int smart : 1; // Smart-card cryptography
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// MIPS(r) Architecture for Programmers, Volume IV-d
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int dsp : 1; // Digital Signal Processing
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// MIPS(r) Architecture for Programmers, Volume IV-e
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// https://www.mips.com/products/architectures/ase/dsp/
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// Make sure to update MipsFeaturesEnum below if you add a field here.
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} MipsFeatures;
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@ -21,29 +21,29 @@
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CPU_FEATURES_START_CPP_NAMESPACE
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typedef struct {
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int esan3: 1; // instructions named N3, "backported" to esa-mode
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int zarch: 1; // z/Architecture mode active
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int stfle: 1; // store-facility-list-extended
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int msa: 1; // message-security assist
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int ldisp: 1; // long-displacement
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int eimm: 1; // extended-immediate
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int dfp: 1; // decimal floating point & perform floating point operation
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int edat: 1; // huge page support
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int etf3eh: 1; // extended-translation facility 3 enhancement
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int highgprs: 1; // 64-bit register support for 31-bit processes
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int te: 1; // transactional execution
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int vx: 1; // vector extension facility
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int vxd: 1; // vector-packed-decimal facility
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int vxe: 1; // vector-enhancement facility 1
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int gs: 1; // guarded-storage facility
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int vxe2: 1; // vector-enhancements facility 2
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int vxp: 1; // vector-packed-decimal-enhancement facility
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int sort: 1; // enhanced-sort facility
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int dflt: 1; // deflate-conversion facility
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int vxp2: 1; // vector-packed-decimal-enhancement facility 2
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int nnpa: 1; // neural network processing assist facility
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int pcimio: 1; // PCI mio facility
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int sie: 1; // virtualization support
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int esan3 : 1; // instructions named N3, "backported" to esa-mode
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int zarch : 1; // z/Architecture mode active
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int stfle : 1; // store-facility-list-extended
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int msa : 1; // message-security assist
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int ldisp : 1; // long-displacement
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int eimm : 1; // extended-immediate
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int dfp : 1; // decimal floating point & perform floating point operation
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int edat : 1; // huge page support
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int etf3eh : 1; // extended-translation facility 3 enhancement
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int highgprs : 1; // 64-bit register support for 31-bit processes
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int te : 1; // transactional execution
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int vx : 1; // vector extension facility
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int vxd : 1; // vector-packed-decimal facility
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int vxe : 1; // vector-enhancement facility 1
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int gs : 1; // guarded-storage facility
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int vxe2 : 1; // vector-enhancements facility 2
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int vxp : 1; // vector-packed-decimal-enhancement facility
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int sort : 1; // enhanced-sort facility
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int dflt : 1; // deflate-conversion facility
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int vxp2 : 1; // vector-packed-decimal-enhancement facility 2
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int nnpa : 1; // neural network processing assist facility
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int pcimio : 1; // PCI mio facility
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int sie : 1; // virtualization support
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// Make sure to update S390XFeaturesEnum below if you add a field here.
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} S390XFeatures;
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@ -55,11 +55,11 @@ typedef struct {
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S390XInfo GetS390XInfo(void);
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typedef struct {
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char platform[64]; // 0 terminated string
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char platform[64]; // 0 terminated string
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} S390XPlatformTypeStrings;
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typedef struct {
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int num_processors; // -1 if N/A
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int num_processors; // -1 if N/A
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S390XPlatformTypeStrings type;
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} S390XPlatformStrings;
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@ -95,7 +95,8 @@ typedef enum {
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S390X_LAST_,
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} S390XFeaturesEnum;
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int GetS390XFeaturesEnumValue(const S390XFeatures* features, S390XFeaturesEnum value);
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int GetS390XFeaturesEnumValue(const S390XFeatures* features,
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S390XFeaturesEnum value);
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const char* GetS390XFeaturesEnumName(S390XFeaturesEnum);
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@ -109,8 +109,8 @@ typedef struct {
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int fs_rep_stosb : 1; // Fast short REP STOSB
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int fs_rep_cmpsb_scasb : 1; // Fast short REP CMPSB/SCASB
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int lam: 1; // Intel Linear Address Mask
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int uai: 1; // AMD Upper Address Ignore
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int lam : 1; // Intel Linear Address Mask
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int uai : 1; // AMD Upper Address Ignore
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// Make sure to update X86FeaturesEnum below if you add a field here.
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} X86Features;
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