mirror of
https://github.com/google/cpu_features.git
synced 2025-04-27 23:22:31 +02:00
[NFC] clang-format the code base
This commit is contained in:
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@ -26,7 +26,7 @@ CPU_FEATURES_START_CPP_NAMESPACE
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typedef struct {
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// Base
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int CPUCFG : 1; // Instruction for Identify CPU Features
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int CPUCFG : 1; // Instruction for Identify CPU Features
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// Extension
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int LAM : 1; // Extension for Atomic Memory Access Instructions
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@ -36,7 +36,8 @@ typedef struct {
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int LASX : 1; // Extension for Loongson Advanced SIMD eXtension
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int CRC32 : 1; // Extension for Cyclic Redundancy Check Instructions
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int COMPLEX : 1; // Extension for Complex Vector Operation Instructions
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int CRYPTO : 1; // Extension for Encryption And Decryption Vector Instructions
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int CRYPTO : 1; // Extension for Encryption And Decryption Vector
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// Instructions
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int LVZ : 1; // Extension for Virtualization
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int LBT_X86 : 1; // Extension for X86 Binary Translation Extension
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int LBT_ARM : 1; // Extension for ARM Binary Translation Extension
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@ -69,7 +70,7 @@ typedef enum {
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LoongArchInfo GetLoongArchInfo(void);
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int GetLoongArchFeaturesEnumValue(const LoongArchFeatures* features,
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LoongArchFeaturesEnum value);
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LoongArchFeaturesEnum value);
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const char* GetLoongArchFeaturesEnumName(LoongArchFeaturesEnum);
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CPU_FEATURES_END_CPP_NAMESPACE
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@ -21,20 +21,20 @@
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CPU_FEATURES_START_CPP_NAMESPACE
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typedef struct {
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int msa : 1; // MIPS SIMD Architecture
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// https://www.mips.com/products/architectures/ase/simd/
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int eva : 1; // Enhanced Virtual Addressing
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// https://www.mips.com/products/architectures/mips64/
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int r6 : 1; // True if is release 6 of the processor.
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int mips16 : 1; // Compressed instructions
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int mdmx : 1; // MIPS Digital Media Extension
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int mips3d : 1; // 3D graphics acceleration
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// MIPS(r) Architecture for Programmers, Volume IV-c
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int smart : 1; // Smart-card cryptography
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// MIPS(r) Architecture for Programmers, Volume IV-d
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int dsp : 1; // Digital Signal Processing
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// MIPS(r) Architecture for Programmers, Volume IV-e
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// https://www.mips.com/products/architectures/ase/dsp/
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int msa : 1; // MIPS SIMD Architecture
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// https://www.mips.com/products/architectures/ase/simd/
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int eva : 1; // Enhanced Virtual Addressing
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// https://www.mips.com/products/architectures/mips64/
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int r6 : 1; // True if is release 6 of the processor.
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int mips16 : 1; // Compressed instructions
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int mdmx : 1; // MIPS Digital Media Extension
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int mips3d : 1; // 3D graphics acceleration
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// MIPS(r) Architecture for Programmers, Volume IV-c
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int smart : 1; // Smart-card cryptography
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// MIPS(r) Architecture for Programmers, Volume IV-d
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int dsp : 1; // Digital Signal Processing
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// MIPS(r) Architecture for Programmers, Volume IV-e
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// https://www.mips.com/products/architectures/ase/dsp/
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// Make sure to update MipsFeaturesEnum below if you add a field here.
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} MipsFeatures;
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@ -21,29 +21,29 @@
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CPU_FEATURES_START_CPP_NAMESPACE
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typedef struct {
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int esan3: 1; // instructions named N3, "backported" to esa-mode
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int zarch: 1; // z/Architecture mode active
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int stfle: 1; // store-facility-list-extended
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int msa: 1; // message-security assist
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int ldisp: 1; // long-displacement
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int eimm: 1; // extended-immediate
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int dfp: 1; // decimal floating point & perform floating point operation
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int edat: 1; // huge page support
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int etf3eh: 1; // extended-translation facility 3 enhancement
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int highgprs: 1; // 64-bit register support for 31-bit processes
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int te: 1; // transactional execution
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int vx: 1; // vector extension facility
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int vxd: 1; // vector-packed-decimal facility
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int vxe: 1; // vector-enhancement facility 1
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int gs: 1; // guarded-storage facility
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int vxe2: 1; // vector-enhancements facility 2
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int vxp: 1; // vector-packed-decimal-enhancement facility
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int sort: 1; // enhanced-sort facility
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int dflt: 1; // deflate-conversion facility
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int vxp2: 1; // vector-packed-decimal-enhancement facility 2
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int nnpa: 1; // neural network processing assist facility
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int pcimio: 1; // PCI mio facility
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int sie: 1; // virtualization support
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int esan3 : 1; // instructions named N3, "backported" to esa-mode
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int zarch : 1; // z/Architecture mode active
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int stfle : 1; // store-facility-list-extended
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int msa : 1; // message-security assist
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int ldisp : 1; // long-displacement
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int eimm : 1; // extended-immediate
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int dfp : 1; // decimal floating point & perform floating point operation
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int edat : 1; // huge page support
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int etf3eh : 1; // extended-translation facility 3 enhancement
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int highgprs : 1; // 64-bit register support for 31-bit processes
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int te : 1; // transactional execution
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int vx : 1; // vector extension facility
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int vxd : 1; // vector-packed-decimal facility
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int vxe : 1; // vector-enhancement facility 1
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int gs : 1; // guarded-storage facility
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int vxe2 : 1; // vector-enhancements facility 2
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int vxp : 1; // vector-packed-decimal-enhancement facility
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int sort : 1; // enhanced-sort facility
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int dflt : 1; // deflate-conversion facility
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int vxp2 : 1; // vector-packed-decimal-enhancement facility 2
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int nnpa : 1; // neural network processing assist facility
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int pcimio : 1; // PCI mio facility
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int sie : 1; // virtualization support
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// Make sure to update S390XFeaturesEnum below if you add a field here.
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} S390XFeatures;
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@ -55,11 +55,11 @@ typedef struct {
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S390XInfo GetS390XInfo(void);
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typedef struct {
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char platform[64]; // 0 terminated string
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char platform[64]; // 0 terminated string
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} S390XPlatformTypeStrings;
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typedef struct {
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int num_processors; // -1 if N/A
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int num_processors; // -1 if N/A
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S390XPlatformTypeStrings type;
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} S390XPlatformStrings;
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@ -95,7 +95,8 @@ typedef enum {
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S390X_LAST_,
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} S390XFeaturesEnum;
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int GetS390XFeaturesEnumValue(const S390XFeatures* features, S390XFeaturesEnum value);
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int GetS390XFeaturesEnumValue(const S390XFeatures* features,
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S390XFeaturesEnum value);
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const char* GetS390XFeaturesEnumName(S390XFeaturesEnum);
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@ -109,8 +109,8 @@ typedef struct {
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int fs_rep_stosb : 1; // Fast short REP STOSB
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int fs_rep_cmpsb_scasb : 1; // Fast short REP CMPSB/SCASB
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int lam: 1; // Intel Linear Address Mask
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int uai: 1; // AMD Upper Address Ignore
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int lam : 1; // Intel Linear Address Mask
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int uai : 1; // AMD Upper Address Ignore
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// Make sure to update X86FeaturesEnum below if you add a field here.
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} X86Features;
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@ -60,7 +60,8 @@ Aarch64Info GetAarch64Info(void) {
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info.features.crc32 = GetDarwinSysCtlByName("hw.optional.armv8_crc32");
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info.features.atomics = GetDarwinSysCtlByName("hw.optional.arm.FEAT_LSE");
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info.features.fphp = GetDarwinSysCtlByName("hw.optional.arm.FEAT_FP16");
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info.features.asimdhp = GetDarwinSysCtlByName("hw.optional.arm.AdvSIMD_HPFPCvt");
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info.features.asimdhp =
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GetDarwinSysCtlByName("hw.optional.arm.AdvSIMD_HPFPCvt");
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info.features.asimdrdm = GetDarwinSysCtlByName("hw.optional.arm.FEAT_RDM");
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info.features.jscvt = GetDarwinSysCtlByName("hw.optional.arm.FEAT_JSCVT");
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info.features.fcma = GetDarwinSysCtlByName("hw.optional.arm.FEAT_FCMA");
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@ -124,7 +124,6 @@ Aarch64Info GetAarch64Info(void) {
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info.features.atomics = GetWindowsIsProcessorFeaturePresent(
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PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE);
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bool is_crypto_available = GetWindowsIsProcessorFeaturePresent(
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PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE);
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info.features.aes = is_crypto_available;
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@ -22,19 +22,19 @@
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////////////////////////////////////////////////////////////////////////////////
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// Definitions for introspection.
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////////////////////////////////////////////////////////////////////////////////
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#define INTROSPECTION_TABLE \
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LINE(LOONGARCH_CPUCFG, CPUCFG, "cfg", HWCAP_LOONGARCH_CPUCFG, 0) \
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LINE(LOONGARCH_LAM, LAM, "lam", HWCAP_LOONGARCH_LAM, 0) \
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LINE(LOONGARCH_UAL, UAL, "ual", HWCAP_LOONGARCH_UAL, 0) \
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LINE(LOONGARCH_FPU, FPU, "fpu", HWCAP_LOONGARCH_FPU, 0) \
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LINE(LOONGARCH_LSX, LSX, "lsx", HWCAP_LOONGARCH_LSX, 0) \
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LINE(LOONGARCH_LASX, LASX, "lasx", HWCAP_LOONGARCH_LASX, 0) \
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LINE(LOONGARCH_CRC32, CRC32, "crc32", HWCAP_LOONGARCH_CRC32, 0) \
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LINE(LOONGARCH_COMPLEX, COMPLEX, "complex", HWCAP_LOONGARCH_COMPLEX, 0) \
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LINE(LOONGARCH_CRYPTO, CRYPTO, "crypto", HWCAP_LOONGARCH_CRYPTO, 0) \
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LINE(LOONGARCH_LVZ, LVZ, "lvz", HWCAP_LOONGARCH_LVZ, 0) \
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LINE(LOONGARCH_LBT_X86, LBT_X86, "lbt_x86", HWCAP_LOONGARCH_LBT_X86, 0) \
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LINE(LOONGARCH_LBT_ARM, LBT_ARM, "lbt_arm", HWCAP_LOONGARCH_LBT_ARM, 0) \
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#define INTROSPECTION_TABLE \
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LINE(LOONGARCH_CPUCFG, CPUCFG, "cfg", HWCAP_LOONGARCH_CPUCFG, 0) \
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LINE(LOONGARCH_LAM, LAM, "lam", HWCAP_LOONGARCH_LAM, 0) \
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LINE(LOONGARCH_UAL, UAL, "ual", HWCAP_LOONGARCH_UAL, 0) \
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LINE(LOONGARCH_FPU, FPU, "fpu", HWCAP_LOONGARCH_FPU, 0) \
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LINE(LOONGARCH_LSX, LSX, "lsx", HWCAP_LOONGARCH_LSX, 0) \
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LINE(LOONGARCH_LASX, LASX, "lasx", HWCAP_LOONGARCH_LASX, 0) \
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LINE(LOONGARCH_CRC32, CRC32, "crc32", HWCAP_LOONGARCH_CRC32, 0) \
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LINE(LOONGARCH_COMPLEX, COMPLEX, "complex", HWCAP_LOONGARCH_COMPLEX, 0) \
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LINE(LOONGARCH_CRYPTO, CRYPTO, "crypto", HWCAP_LOONGARCH_CRYPTO, 0) \
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LINE(LOONGARCH_LVZ, LVZ, "lvz", HWCAP_LOONGARCH_LVZ, 0) \
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LINE(LOONGARCH_LBT_X86, LBT_X86, "lbt_x86", HWCAP_LOONGARCH_LBT_X86, 0) \
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LINE(LOONGARCH_LBT_ARM, LBT_ARM, "lbt_arm", HWCAP_LOONGARCH_LBT_ARM, 0) \
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LINE(LOONGARCH_LBT_MIPS, LBT_MIPS, "lbt_mips", HWCAP_LOONGARCH_LBT_MIPS, 0) \
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LINE(LOONGARCH_PTW, PTW, "ptw", HWCAP_LOONGARCH_PTW, 0)
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#define INTROSPECTION_PREFIX LoongArch
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@ -53,7 +53,8 @@
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static const LoongArchInfo kEmptyLoongArchInfo;
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static bool HandleLoongArchLine(const LineResult result, LoongArchInfo* const info) {
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static bool HandleLoongArchLine(const LineResult result,
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LoongArchInfo* const info) {
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StringView line = result.line;
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StringView key, value;
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if (CpuFeatures_StringView_GetAttributeKeyValue(line, &key, &value)) {
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@ -69,7 +69,7 @@
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LINE(PPC_SCV, scv, "scv", 0, PPC_FEATURE2_SCV) \
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LINE(PPC_HTM_NO_SUSPEND, htm_no_suspend, "htm-no-suspend", 0, \
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PPC_FEATURE2_HTM_NO_SUSPEND)
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#undef PPC // Remove conflict with compiler generated preprocessor
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#undef PPC // Remove conflict with compiler generated preprocessor
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#define INTROSPECTION_PREFIX PPC
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#define INTROSPECTION_ENUM_PREFIX PPC
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#include "define_introspection_and_hwcaps.inl"
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@ -22,29 +22,29 @@
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////////////////////////////////////////////////////////////////////////////////
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// Definitions for introspection.
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////////////////////////////////////////////////////////////////////////////////
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#define INTROSPECTION_TABLE \
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LINE(S390_ESAN3, esan3, "esan3", HWCAP_S390_ESAN3, 0) \
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LINE(S390_ZARCH, zarch, "zarch", HWCAP_S390_ZARCH, 0) \
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LINE(S390_STFLE, stfle, "stfle", HWCAP_S390_STFLE, 0) \
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LINE(S390_MSA, msa, "msa", HWCAP_S390_MSA, 0) \
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LINE(S390_LDISP, ldisp, "ldisp", HWCAP_S390_LDISP, 0) \
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LINE(S390_EIMM, eimm, "eimm", HWCAP_S390_EIMM, 0) \
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LINE(S390_DFP, dfp, "dfp", HWCAP_S390_DFP, 0) \
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LINE(S390_EDAT, edat, "edat", HWCAP_S390_HPAGE, 0) \
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LINE(S390_ETF3EH, etf3eh, "etf3eh", HWCAP_S390_ETF3EH, 0) \
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LINE(S390_HIGHGPRS, highgprs, "highgprs", HWCAP_S390_HIGH_GPRS, 0) \
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LINE(S390_TE, te, "te", HWCAP_S390_TE, 0) \
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LINE(S390_VX, vx, "vx", HWCAP_S390_VXRS, 0) \
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LINE(S390_VXD, vxd, "vxd", HWCAP_S390_VXRS_BCD, 0) \
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LINE(S390_VXE, vxe, "vxe", HWCAP_S390_VXRS_EXT, 0) \
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LINE(S390_GS, gs, "gs", HWCAP_S390_GS, 0) \
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LINE(S390_VXE2, vxe2, "vxe2", HWCAP_S390_VXRS_EXT2, 0) \
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LINE(S390_VXP, vxp, "vxp", HWCAP_S390_VXRS_PDE, 0) \
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LINE(S390_SORT, sort, "sort", HWCAP_S390_SORT, 0) \
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LINE(S390_DFLT, dflt, "dflt", HWCAP_S390_DFLT, 0) \
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LINE(S390_VXP2, vxp2, "vxp2", HWCAP_S390_VXRS_PDE2, 0) \
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LINE(S390_NNPA, nnpa, "nnpa", HWCAP_S390_NNPA, 0) \
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LINE(S390_PCIMIO, pcimio, "pcimio", HWCAP_S390_PCI_MIO, 0) \
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#define INTROSPECTION_TABLE \
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LINE(S390_ESAN3, esan3, "esan3", HWCAP_S390_ESAN3, 0) \
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LINE(S390_ZARCH, zarch, "zarch", HWCAP_S390_ZARCH, 0) \
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LINE(S390_STFLE, stfle, "stfle", HWCAP_S390_STFLE, 0) \
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LINE(S390_MSA, msa, "msa", HWCAP_S390_MSA, 0) \
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LINE(S390_LDISP, ldisp, "ldisp", HWCAP_S390_LDISP, 0) \
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LINE(S390_EIMM, eimm, "eimm", HWCAP_S390_EIMM, 0) \
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LINE(S390_DFP, dfp, "dfp", HWCAP_S390_DFP, 0) \
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LINE(S390_EDAT, edat, "edat", HWCAP_S390_HPAGE, 0) \
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LINE(S390_ETF3EH, etf3eh, "etf3eh", HWCAP_S390_ETF3EH, 0) \
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LINE(S390_HIGHGPRS, highgprs, "highgprs", HWCAP_S390_HIGH_GPRS, 0) \
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LINE(S390_TE, te, "te", HWCAP_S390_TE, 0) \
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LINE(S390_VX, vx, "vx", HWCAP_S390_VXRS, 0) \
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LINE(S390_VXD, vxd, "vxd", HWCAP_S390_VXRS_BCD, 0) \
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LINE(S390_VXE, vxe, "vxe", HWCAP_S390_VXRS_EXT, 0) \
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LINE(S390_GS, gs, "gs", HWCAP_S390_GS, 0) \
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LINE(S390_VXE2, vxe2, "vxe2", HWCAP_S390_VXRS_EXT2, 0) \
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LINE(S390_VXP, vxp, "vxp", HWCAP_S390_VXRS_PDE, 0) \
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LINE(S390_SORT, sort, "sort", HWCAP_S390_SORT, 0) \
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LINE(S390_DFLT, dflt, "dflt", HWCAP_S390_DFLT, 0) \
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LINE(S390_VXP2, vxp2, "vxp2", HWCAP_S390_VXRS_PDE2, 0) \
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LINE(S390_NNPA, nnpa, "nnpa", HWCAP_S390_NNPA, 0) \
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LINE(S390_PCIMIO, pcimio, "pcimio", HWCAP_S390_PCI_MIO, 0) \
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LINE(S390_SIE, sie, "sie", HWCAP_S390_SIE, 0)
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#define INTROSPECTION_PREFIX S390X
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#define INTROSPECTION_ENUM_PREFIX S390X
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@ -63,12 +63,13 @@
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#include "internal/string_view.h"
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static bool HandleS390XLine(const LineResult result,
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S390XPlatformStrings* const strings) {
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S390XPlatformStrings* const strings) {
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StringView line = result.line;
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StringView key, value;
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if (CpuFeatures_StringView_GetAttributeKeyValue(line, &key, &value)) {
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if (CpuFeatures_StringView_IsEquals(key, str("# processors"))) {
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strings->num_processors = CpuFeatures_StringView_ParsePositiveNumber(value);
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strings->num_processors =
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CpuFeatures_StringView_ParsePositiveNumber(value);
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}
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}
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return !result.eof;
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@ -50,8 +50,8 @@ static void DetectFeaturesFromOs(X86Info* info, X86Features* features) {
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features->sse4_2 =
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GetWindowsIsProcessorFeaturePresent(PF_SSE4_2_INSTRUCTIONS_AVAILABLE);
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// do not bother checking PF_AVX*
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// cause AVX enabled processor will have XCR0 be exposed and this function will be skipped at all
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// Do not bother checking PF_AVX* : AVX enabled processor will have their XCR0
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// register exposed and this function will be skipped altogether.
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}
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#endif // CPU_FEATURES_OS_WINDOWS
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@ -212,14 +212,14 @@ DEFINE_ADD_FLAGS(GetMipsFeaturesEnumValue, GetMipsFeaturesEnumName,
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DEFINE_ADD_FLAGS(GetPPCFeaturesEnumValue, GetPPCFeaturesEnumName, PPCFeatures,
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PPC_LAST_)
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#elif defined(CPU_FEATURES_ARCH_S390X)
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DEFINE_ADD_FLAGS(GetS390XFeaturesEnumValue, GetS390XFeaturesEnumName, S390XFeatures,
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S390X_LAST_)
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DEFINE_ADD_FLAGS(GetS390XFeaturesEnumValue, GetS390XFeaturesEnumName,
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S390XFeatures, S390X_LAST_)
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#elif defined(CPU_FEATURES_ARCH_RISCV)
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DEFINE_ADD_FLAGS(GetRiscvFeaturesEnumValue, GetRiscvFeaturesEnumName, RiscvFeatures,
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RISCV_LAST_)
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DEFINE_ADD_FLAGS(GetRiscvFeaturesEnumValue, GetRiscvFeaturesEnumName,
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RiscvFeatures, RISCV_LAST_)
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#elif defined(CPU_FEATURES_ARCH_LOONGARCH)
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DEFINE_ADD_FLAGS(GetLoongArchFeaturesEnumValue, GetLoongArchFeaturesEnumName, LoongArchFeatures,
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LOONGARCH_LAST_)
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DEFINE_ADD_FLAGS(GetLoongArchFeaturesEnumValue, GetLoongArchFeaturesEnumName,
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LoongArchFeatures, LOONGARCH_LAST_)
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#endif
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// Prints a json string with characters escaping.
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