mirror of
https://github.com/google/cpu_features.git
synced 2025-07-01 13:21:13 +02:00
Add partial implementation of ndk_compat (#54)
* First implementation of ndk_compat * Restrict building of linux_based_hardware_detection to UNIX * Fix variable declaration and printf formatting * Restrict ndk compat to UNIX style systems * Restrict cpu_mask index to 32 * Fix values display in ndk-compat-test * Addressing comments
This commit is contained in:
Guillaume Chatelet
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commit
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4
ndk_compat/README.md
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4
ndk_compat/README.md
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Provides a header compatible with [android's NDK cpu-features.h](https://android.googlesource.com/platform/ndk/+/master/sources/android/cpufeatures/cpu-features.h).
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It is intended to be a drop in replacement for this header and help users
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transition from the NDK to [Google's cpu_features library](https://github.com/google/cpu_features).
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199
ndk_compat/cpu-features.c
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199
ndk_compat/cpu-features.c
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#include "cpu-features.h"
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#include "cpu_features_macros.h"
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#include "internal/filesystem.h"
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#include "internal/stack_line_reader.h"
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#include "internal/string_view.h"
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#include <pthread.h>
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#if defined(CPU_FEATURES_ARCH_ARM)
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#include "cpuinfo_arm.h"
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#elif defined(CPU_FEATURES_ARCH_X86)
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#include "cpuinfo_x86.h"
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#elif defined(CPU_FEATURES_ARCH_MIPS)
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#include "cpuinfo_mips.h"
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#elif defined(CPU_FEATURES_ARCH_AARCH64)
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#include "cpuinfo_aarch64.h"
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#endif
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static pthread_once_t g_once;
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static int g_inited;
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static uint64_t g_cpuFeatures;
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static int g_cpuCount;
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#ifdef CPU_FEATURES_ARCH_ARM
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static uint32_t g_cpuIdArm;
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#endif
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static void set_cpu_mask_bit(uint32_t index, uint32_t* cpu_mask) {
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*cpu_mask |= 1UL << index;
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}
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// Examples of valid inputs: "31", "4-31"
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static void parse_cpu_mask(const StringView text, uint32_t* cpu_mask) {
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int separator_index = CpuFeatures_StringView_IndexOfChar(text, '-');
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if (separator_index < 0) { // A single cpu index
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int cpu_index = CpuFeatures_StringView_ParsePositiveNumber(text);
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if (cpu_index < 0) return;
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set_cpu_mask_bit(cpu_index, cpu_mask);
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} else {
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int cpu_index_a = CpuFeatures_StringView_ParsePositiveNumber(
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CpuFeatures_StringView_KeepFront(text, separator_index));
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int cpu_index_b = CpuFeatures_StringView_ParsePositiveNumber(
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CpuFeatures_StringView_PopFront(text, separator_index + 1));
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int i;
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if (cpu_index_a < 0 || cpu_index_b < 0) return;
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for (i = cpu_index_a; i <= cpu_index_b; ++i) {
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if (i < 32) {
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set_cpu_mask_bit(i, cpu_mask);
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}
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}
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}
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}
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// Format specification from
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// https://www.kernel.org/doc/Documentation/cputopology.txt
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// Examples of valid inputs: "31", "2,4-31,32-63", "0-1,3"
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static void parse_cpu_mask_line(const LineResult result, uint32_t* cpu_mask) {
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if (!result.full_line || result.eof) return;
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StringView line = result.line;
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for (; line.size > 0;) {
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int next_entry_index = CpuFeatures_StringView_IndexOfChar(line, ',');
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if (next_entry_index < 0) {
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parse_cpu_mask(line, cpu_mask);
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break;
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}
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StringView entry = CpuFeatures_StringView_KeepFront(line, next_entry_index);
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parse_cpu_mask(entry, cpu_mask);
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line = CpuFeatures_StringView_PopFront(line, next_entry_index + 1);
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}
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}
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static void update_cpu_mask_from_file(const char* filename,
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uint32_t* cpu_mask) {
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const int fd = CpuFeatures_OpenFile(filename);
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if (fd >= 0) {
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StackLineReader reader;
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StackLineReader_Initialize(&reader, fd);
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parse_cpu_mask_line(StackLineReader_NextLine(&reader), cpu_mask);
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CpuFeatures_CloseFile(fd);
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}
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}
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static int get_cpu_count(void) {
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uint32_t cpu_mask = 0;
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update_cpu_mask_from_file("/sys/devices/system/cpu/present", &cpu_mask);
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update_cpu_mask_from_file("/sys/devices/system/cpu/possible", &cpu_mask);
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return __builtin_popcount(cpu_mask);
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}
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static void android_cpuInit(void) {
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g_cpuFeatures = 0;
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g_cpuCount = 1;
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g_inited = 1;
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g_cpuCount = get_cpu_count();
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if (g_cpuCount == 0) {
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g_cpuCount = 1;
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}
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#if defined(CPU_FEATURES_ARCH_ARM)
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ArmInfo info = GetArmInfo();
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if (info.architecture == 7) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_ARMv7;
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if (info.features.vfpv3) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3;
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if (info.features.neon) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_NEON;
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if (info.features.vfpv3d16) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFP_FP16;
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if (info.features.idiva) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM;
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if (info.features.idivt) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2;
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if (info.features.iwmmxt) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_iWMMXt;
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if (info.features.aes) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_AES;
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if (info.features.pmull) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_PMULL;
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if (info.features.sha1) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA1;
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if (info.features.sha2) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA2;
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if (info.features.crc32) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_CRC32;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_LDREX_STREX;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFP_D32;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFP_FMA;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_NEON_FMA;
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g_cpuIdArm = GetArmCpuId(&info);
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#elif defined(CPU_FEATURES_ARCH_X86)
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X86Info info = GetX86Info();
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if (info.features.ssse3) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSSE3;
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if (info.features.sse4_1) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSE4_1;
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if (info.features.sse4_2) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSE4_2;
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if (info.features.avx) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AVX;
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if (info.features.avx2) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AVX2;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AES_NI;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_RDRAND;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT;
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SHA_NI;
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#elif defined(CPU_FEATURES_ARCH_MIPS)
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MipsInfo info = GetMipsInfo();
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// if (info.features.) g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_R6;
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if (info.features.msa) g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_MSA;
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#elif defined(CPU_FEATURES_ARCH_AARCH64)
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Aarch64Info info = GetAarch64Info();
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if (info.features.fp) g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_FP;
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if (info.features.asimd) g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_ASIMD;
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if (info.features.aes) g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_AES;
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if (info.features.pmull) g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_PMULL;
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if (info.features.sha1) g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA1;
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if (info.features.sha2) g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA2;
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if (info.features.crc32) g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_CRC32;
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#endif
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}
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AndroidCpuFamily android_getCpuFamily(void) {
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#if defined(CPU_FEATURES_ARCH_ARM)
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return ANDROID_CPU_FAMILY_ARM;
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#elif defined(CPU_FEATURES_ARCH_X86_32)
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return ANDROID_CPU_FAMILY_X86;
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#elif defined(CPU_FEATURES_ARCH_MIPS64)
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return ANDROID_CPU_FAMILY_MIPS64;
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#elif defined(CPU_FEATURES_ARCH_MIPS32)
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return ANDROID_CPU_FAMILY_MIPS;
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#elif defined(CPU_FEATURES_ARCH_AARCH64)
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return ANDROID_CPU_FAMILY_ARM64;
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#elif defined(CPU_FEATURES_ARCH_X86_64)
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return ANDROID_CPU_FAMILY_X86_64;
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#else
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return ANDROID_CPU_FAMILY_UNKNOWN;
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#endif
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}
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uint64_t android_getCpuFeatures(void) {
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pthread_once(&g_once, android_cpuInit);
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return g_cpuFeatures;
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}
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int android_getCpuCount(void) {
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pthread_once(&g_once, android_cpuInit);
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return g_cpuCount;
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}
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static void android_cpuInitDummy(void) { g_inited = 1; }
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int android_setCpu(int cpu_count, uint64_t cpu_features) {
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/* Fail if the library was already initialized. */
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if (g_inited) return 0;
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g_cpuCount = (cpu_count <= 0 ? 1 : cpu_count);
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g_cpuFeatures = cpu_features;
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pthread_once(&g_once, android_cpuInitDummy);
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return 1;
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}
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#ifdef CPU_FEATURES_ARCH_ARM
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uint32_t android_getCpuIdArm(void) {
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pthread_once(&g_once, android_cpuInit);
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return g_cpuIdArm;
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}
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int android_setCpuArm(int cpu_count, uint64_t cpu_features, uint32_t cpu_id) {
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if (!android_setCpu(cpu_count, cpu_features)) return 0;
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g_cpuIdArm = cpu_id;
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return 1;
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}
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#endif // CPU_FEATURES_ARCH_ARM
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318
ndk_compat/cpu-features.h
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318
ndk_compat/cpu-features.h
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/*
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* Copyright (C) 2010 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef GOOGLE_CPU_FEATURES_H
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#define GOOGLE_CPU_FEATURES_H
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#include <stdint.h>
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#include <sys/cdefs.h>
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__BEGIN_DECLS
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/* A list of valid values returned by android_getCpuFamily().
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* They describe the CPU Architecture of the current process.
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*/
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typedef enum {
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ANDROID_CPU_FAMILY_UNKNOWN = 0,
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ANDROID_CPU_FAMILY_ARM,
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ANDROID_CPU_FAMILY_X86,
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ANDROID_CPU_FAMILY_MIPS,
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ANDROID_CPU_FAMILY_ARM64,
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ANDROID_CPU_FAMILY_X86_64,
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ANDROID_CPU_FAMILY_MIPS64,
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ANDROID_CPU_FAMILY_MAX /* do not remove */
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} AndroidCpuFamily;
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/* Return the CPU family of the current process.
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*
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* Note that this matches the bitness of the current process. I.e. when
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* running a 32-bit binary on a 64-bit capable CPU, this will return the
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* 32-bit CPU family value.
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*/
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extern AndroidCpuFamily android_getCpuFamily(void);
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/* Return a bitmap describing a set of optional CPU features that are
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* supported by the current device's CPU. The exact bit-flags returned
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* depend on the value returned by android_getCpuFamily(). See the
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* documentation for the ANDROID_CPU_*_FEATURE_* flags below for details.
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*/
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extern uint64_t android_getCpuFeatures(void);
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/* The list of feature flags for ANDROID_CPU_FAMILY_ARM that can be
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* recognized by the library (see note below for 64-bit ARM). Value details
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* are:
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*
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* VFPv2:
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* CPU supports the VFPv2 instruction set. Many, but not all, ARMv6 CPUs
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* support these instructions. VFPv2 is a subset of VFPv3 so this will
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* be set whenever VFPv3 is set too.
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*
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* ARMv7:
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* CPU supports the ARMv7-A basic instruction set.
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* This feature is mandated by the 'armeabi-v7a' ABI.
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*
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* VFPv3:
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* CPU supports the VFPv3-D16 instruction set, providing hardware FPU
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* support for single and double precision floating point registers.
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* Note that only 16 FPU registers are available by default, unless
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* the D32 bit is set too. This feature is also mandated by the
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* 'armeabi-v7a' ABI.
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*
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* VFP_D32:
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* CPU VFP optional extension that provides 32 FPU registers,
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* instead of 16. Note that ARM mandates this feature is the 'NEON'
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* feature is implemented by the CPU.
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*
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* NEON:
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* CPU FPU supports "ARM Advanced SIMD" instructions, also known as
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* NEON. Note that this mandates the VFP_D32 feature as well, per the
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* ARM Architecture specification.
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*
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* VFP_FP16:
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* Half-width floating precision VFP extension. If set, the CPU
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* supports instructions to perform floating-point operations on
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* 16-bit registers. This is part of the VFPv4 specification, but
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* not mandated by any Android ABI.
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*
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* VFP_FMA:
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* Fused multiply-accumulate VFP instructions extension. Also part of
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* the VFPv4 specification, but not mandated by any Android ABI.
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*
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* NEON_FMA:
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* Fused multiply-accumulate NEON instructions extension. Optional
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* extension from the VFPv4 specification, but not mandated by any
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* Android ABI.
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*
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* IDIV_ARM:
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* Integer division available in ARM mode. Only available
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* on recent CPUs (e.g. Cortex-A15).
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*
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* IDIV_THUMB2:
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* Integer division available in Thumb-2 mode. Only available
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* on recent CPUs (e.g. Cortex-A15).
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*
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* iWMMXt:
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* Optional extension that adds MMX registers and operations to an
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* ARM CPU. This is only available on a few XScale-based CPU designs
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* sold by Marvell. Pretty rare in practice.
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*
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* AES:
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* CPU supports AES instructions. These instructions are only
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* available for 32-bit applications running on ARMv8 CPU.
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*
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* CRC32:
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* CPU supports CRC32 instructions. These instructions are only
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* available for 32-bit applications running on ARMv8 CPU.
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*
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* SHA2:
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* CPU supports SHA2 instructions. These instructions are only
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* available for 32-bit applications running on ARMv8 CPU.
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*
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* SHA1:
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* CPU supports SHA1 instructions. These instructions are only
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* available for 32-bit applications running on ARMv8 CPU.
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*
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* PMULL:
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* CPU supports 64-bit PMULL and PMULL2 instructions. These
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* instructions are only available for 32-bit applications
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* running on ARMv8 CPU.
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*
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* If you want to tell the compiler to generate code that targets one of
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* the feature set above, you should probably use one of the following
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* flags (for more details, see technical note at the end of this file):
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*
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* -mfpu=vfp
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* -mfpu=vfpv2
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* These are equivalent and tell GCC to use VFPv2 instructions for
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* floating-point operations. Use this if you want your code to
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* run on *some* ARMv6 devices, and any ARMv7-A device supported
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* by Android.
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*
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* Generated code requires VFPv2 feature.
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*
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* -mfpu=vfpv3-d16
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* Tell GCC to use VFPv3 instructions (using only 16 FPU registers).
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* This should be generic code that runs on any CPU that supports the
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* 'armeabi-v7a' Android ABI. Note that no ARMv6 CPU supports this.
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*
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* Generated code requires VFPv3 feature.
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*
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* -mfpu=vfpv3
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* Tell GCC to use VFPv3 instructions with 32 FPU registers.
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* Generated code requires VFPv3|VFP_D32 features.
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*
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* -mfpu=neon
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* Tell GCC to use VFPv3 instructions with 32 FPU registers, and
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* also support NEON intrinsics (see <arm_neon.h>).
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* Generated code requires VFPv3|VFP_D32|NEON features.
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*
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* -mfpu=vfpv4-d16
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* Generated code requires VFPv3|VFP_FP16|VFP_FMA features.
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*
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* -mfpu=vfpv4
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* Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32 features.
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*
|
||||
* -mfpu=neon-vfpv4
|
||||
* Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32|NEON|NEON_FMA
|
||||
* features.
|
||||
*
|
||||
* -mcpu=cortex-a7
|
||||
* -mcpu=cortex-a15
|
||||
* Generated code requires VFPv3|VFP_FP16|VFP_FMA|VFP_D32|
|
||||
* NEON|NEON_FMA|IDIV_ARM|IDIV_THUMB2
|
||||
* This flag implies -mfpu=neon-vfpv4.
|
||||
*
|
||||
* -mcpu=iwmmxt
|
||||
* Allows the use of iWMMXt instrinsics with GCC.
|
||||
*
|
||||
* IMPORTANT NOTE: These flags should only be tested when
|
||||
* android_getCpuFamily() returns ANDROID_CPU_FAMILY_ARM, i.e. this is a
|
||||
* 32-bit process.
|
||||
*
|
||||
* When running a 64-bit ARM process on an ARMv8 CPU,
|
||||
* android_getCpuFeatures() will return a different set of bitflags
|
||||
*/
|
||||
enum {
|
||||
ANDROID_CPU_ARM_FEATURE_ARMv7 = (1 << 0),
|
||||
ANDROID_CPU_ARM_FEATURE_VFPv3 = (1 << 1),
|
||||
ANDROID_CPU_ARM_FEATURE_NEON = (1 << 2),
|
||||
ANDROID_CPU_ARM_FEATURE_LDREX_STREX = (1 << 3),
|
||||
ANDROID_CPU_ARM_FEATURE_VFPv2 = (1 << 4),
|
||||
ANDROID_CPU_ARM_FEATURE_VFP_D32 = (1 << 5),
|
||||
ANDROID_CPU_ARM_FEATURE_VFP_FP16 = (1 << 6),
|
||||
ANDROID_CPU_ARM_FEATURE_VFP_FMA = (1 << 7),
|
||||
ANDROID_CPU_ARM_FEATURE_NEON_FMA = (1 << 8),
|
||||
ANDROID_CPU_ARM_FEATURE_IDIV_ARM = (1 << 9),
|
||||
ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 = (1 << 10),
|
||||
ANDROID_CPU_ARM_FEATURE_iWMMXt = (1 << 11),
|
||||
ANDROID_CPU_ARM_FEATURE_AES = (1 << 12),
|
||||
ANDROID_CPU_ARM_FEATURE_PMULL = (1 << 13),
|
||||
ANDROID_CPU_ARM_FEATURE_SHA1 = (1 << 14),
|
||||
ANDROID_CPU_ARM_FEATURE_SHA2 = (1 << 15),
|
||||
ANDROID_CPU_ARM_FEATURE_CRC32 = (1 << 16),
|
||||
};
|
||||
|
||||
/* The bit flags corresponding to the output of android_getCpuFeatures()
|
||||
* when android_getCpuFamily() returns ANDROID_CPU_FAMILY_ARM64. Value details
|
||||
* are:
|
||||
*
|
||||
* FP:
|
||||
* CPU has Floating-point unit.
|
||||
*
|
||||
* ASIMD:
|
||||
* CPU has Advanced SIMD unit.
|
||||
*
|
||||
* AES:
|
||||
* CPU supports AES instructions.
|
||||
*
|
||||
* CRC32:
|
||||
* CPU supports CRC32 instructions.
|
||||
*
|
||||
* SHA2:
|
||||
* CPU supports SHA2 instructions.
|
||||
*
|
||||
* SHA1:
|
||||
* CPU supports SHA1 instructions.
|
||||
*
|
||||
* PMULL:
|
||||
* CPU supports 64-bit PMULL and PMULL2 instructions.
|
||||
*/
|
||||
enum {
|
||||
ANDROID_CPU_ARM64_FEATURE_FP = (1 << 0),
|
||||
ANDROID_CPU_ARM64_FEATURE_ASIMD = (1 << 1),
|
||||
ANDROID_CPU_ARM64_FEATURE_AES = (1 << 2),
|
||||
ANDROID_CPU_ARM64_FEATURE_PMULL = (1 << 3),
|
||||
ANDROID_CPU_ARM64_FEATURE_SHA1 = (1 << 4),
|
||||
ANDROID_CPU_ARM64_FEATURE_SHA2 = (1 << 5),
|
||||
ANDROID_CPU_ARM64_FEATURE_CRC32 = (1 << 6),
|
||||
};
|
||||
|
||||
/* The bit flags corresponding to the output of android_getCpuFeatures()
|
||||
* when android_getCpuFamily() returns ANDROID_CPU_FAMILY_X86 or
|
||||
* ANDROID_CPU_FAMILY_X86_64.
|
||||
*/
|
||||
enum {
|
||||
ANDROID_CPU_X86_FEATURE_SSSE3 = (1 << 0),
|
||||
ANDROID_CPU_X86_FEATURE_POPCNT = (1 << 1),
|
||||
ANDROID_CPU_X86_FEATURE_MOVBE = (1 << 2),
|
||||
ANDROID_CPU_X86_FEATURE_SSE4_1 = (1 << 3),
|
||||
ANDROID_CPU_X86_FEATURE_SSE4_2 = (1 << 4),
|
||||
ANDROID_CPU_X86_FEATURE_AES_NI = (1 << 5),
|
||||
ANDROID_CPU_X86_FEATURE_AVX = (1 << 6),
|
||||
ANDROID_CPU_X86_FEATURE_RDRAND = (1 << 7),
|
||||
ANDROID_CPU_X86_FEATURE_AVX2 = (1 << 8),
|
||||
ANDROID_CPU_X86_FEATURE_SHA_NI = (1 << 9),
|
||||
};
|
||||
|
||||
/* The bit flags corresponding to the output of android_getCpuFeatures()
|
||||
* when android_getCpuFamily() returns ANDROID_CPU_FAMILY_MIPS
|
||||
* or ANDROID_CPU_FAMILY_MIPS64. Values are:
|
||||
*
|
||||
* R6:
|
||||
* CPU executes MIPS Release 6 instructions natively, and
|
||||
* supports obsoleted R1..R5 instructions only via kernel traps.
|
||||
*
|
||||
* MSA:
|
||||
* CPU supports Mips SIMD Architecture instructions.
|
||||
*/
|
||||
enum {
|
||||
ANDROID_CPU_MIPS_FEATURE_R6 = (1 << 0),
|
||||
ANDROID_CPU_MIPS_FEATURE_MSA = (1 << 1),
|
||||
};
|
||||
|
||||
/* Return the number of CPU cores detected on this device. */
|
||||
extern int android_getCpuCount(void);
|
||||
|
||||
/* The following is used to force the CPU count and features
|
||||
* mask in sandboxed processes. Under 4.1 and higher, these processes
|
||||
* cannot access /proc, which is the only way to get information from
|
||||
* the kernel about the current hardware (at least on ARM).
|
||||
*
|
||||
* It _must_ be called only once, and before any android_getCpuXXX
|
||||
* function, any other case will fail.
|
||||
*
|
||||
* This function return 1 on success, and 0 on failure.
|
||||
*/
|
||||
extern int android_setCpu(int cpu_count, uint64_t cpu_features);
|
||||
|
||||
#ifdef __arm__
|
||||
|
||||
/* Retrieve the ARM 32-bit CPUID value from the kernel.
|
||||
* Note that this cannot work on sandboxed processes under 4.1 and
|
||||
* higher, unless you called android_setCpuArm() before.
|
||||
*/
|
||||
extern uint32_t android_getCpuIdArm(void);
|
||||
|
||||
/* An ARM-specific variant of android_setCpu() that also allows you
|
||||
* to set the ARM CPUID field.
|
||||
*/
|
||||
extern int android_setCpuArm(int cpu_count, uint64_t cpu_features,
|
||||
uint32_t cpu_id);
|
||||
|
||||
#endif
|
||||
|
||||
__END_DECLS
|
||||
#endif /* GOOGLE_CPU_FEATURES_H */
|
||||
11
ndk_compat/ndk-compat-test.c
Normal file
11
ndk_compat/ndk-compat-test.c
Normal file
@ -0,0 +1,11 @@
|
||||
#include <stdio.h>
|
||||
#include "cpu-features.h"
|
||||
|
||||
int main() {
|
||||
printf("android_getCpuFamily()=%d\n", android_getCpuFamily());
|
||||
printf("android_getCpuFeatures()=0x%08llx\n", android_getCpuFeatures());
|
||||
printf("android_getCpuCount()=%d\n", android_getCpuCount());
|
||||
#ifdef __arm__
|
||||
printf("android_getCpuIdArm()=0x%04x\n", android_getCpuIdArm());
|
||||
#endif //__arm__
|
||||
}
|
||||
Reference in New Issue
Block a user