fuzun
319bd6f26b
Change feature variables to unsigned int to fully comply with 'true' and 'false' & IsBitSet()
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It seems that ' : 1' alignments cause signed integers to be either -1 or 0. While -1 is true and 0 is false reverse might not be always correct when true is defined 1.
Maybe change feature variables to bool ?
2018-08-30 06:11:35 +03:00
Guillaume Chatelet
9b872ce0b2
Add cx16 (cmpxchg16b) cpuid flag. Fixes #30
2018-03-13 10:58:42 +01:00
Patrik Fiedler
3ee0d62e87
detect intel sgx and smx cpu features for the x86 arch
2018-02-13 11:16:48 +01:00
Guillaume Chatelet
e419573d10
Use CPU_FEATURES_ prefix for namespace macros.
2018-02-12 16:15:15 +01:00
Guillaume Chatelet
11e3e20496
Reverting 338484f6f2176c3d8ede0ed2f3fbd6cf1eb0274c. Fixes #2
2018-02-09 08:55:11 +01:00
Guillaume Chatelet
1d6ba6139c
Merge pull request #5 from bsurmanski/patch-1
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Fix spelling mistake for 'Cannon Lake'
2018-02-08 16:34:15 +01:00
Guillaume Chatelet
338484f6f2
Fixes #2 - vpclmulqdq should be pclmulqdq.
2018-02-08 11:35:31 +01:00
Brandon Surmanski
efcc49a493
Fix spelling mistake for 'Cannon Lake'
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See:
https://www.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/platform-codenames.html
https://en.wikipedia.org/wiki/Cannon_Lake_(microarchitecture)
2018-02-07 11:07:00 -08:00
Guillaume Chatelet
8e58ef0d2b
Removing THIRD_PARTY_ from C headers.
2018-02-01 10:38:48 +01:00
Guillaume Chatelet
439d371594
Adding code. Closes #0 .
2018-02-01 10:03:09 +01:00
