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Author SHA1 Message Date
Guillaume Chatelet
f7e0a6d066 Merge pull request #25 from xqp/feature/detect_sgx_smx 
detect intel sgx and smx cpu features for the x86 arch
 2018-02-13 11:52:28 +01:00
Guillaume Chatelet
d1a8d22346 Amend OS/Arch matrix to remove N/A configurations. 2018-02-13 11:50:53 +01:00
Patrik Fiedler
0f1f3ac262 sort the detection by leaf and bit 2018-02-13 11:44:40 +01:00
Patrik Fiedler
3ee0d62e87 detect intel sgx and smx cpu features for the x86 arch 2018-02-13 11:16:48 +01:00
Guillaume Chatelet
bc8df0c1c5 Update documentation to reflect per OS support. 
Fixes #16
 2018-02-13 10:57:49 +01:00
Guillaume Chatelet
7634420f31 GCC does not discover all cpu features. Fixes #22 2018-02-13 10:12:21 +01:00
Guillaume Chatelet
9df2d78b8d Update googletest management. 2018-02-13 10:07:02 +01:00
Guillaume Chatelet
57917d2b12 Fix typo in CMakeLists.txt 2018-02-12 16:48:57 +01:00
Guillaume Chatelet
1976dcd4d2 Adding CMake install. Fixes #18 2018-02-12 16:17:21 +01:00
Guillaume Chatelet
e419573d10 Use CPU_FEATURES_ prefix for namespace macros. 2018-02-12 16:15:15 +01:00
Guillaume Chatelet
8bace7000c Advertize list_cpu_features demo program. Fixes #19 2018-02-12 12:57:15 +01:00
Guillaume Chatelet
ff8f336eb1 Merge pull request #21 from bsiegert/owners 
Delete OWNERS
 2018-02-12 11:58:03 +01:00
Benny Siegert
a8c95116d3 Delete OWNERS 2018-02-12 11:52:40 +01:00
Guillaume Chatelet
00b1c74a50 Advertise C99 instead of gnu89. Fixes #11 2018-02-12 10:53:52 +01:00
Guillaume Chatelet
979fd986bd Merge pull request #9 from ararslan/aa/shared 
Use fPIC when building as a shared library
 2018-02-09 22:52:39 +01:00
Alex Arslan
6a959dcc1a Use fPIC when building as a shared library 
Also include a note stating that the use of shared libraries is
discouraged.
 2018-02-09 13:14:49 -08:00
Guillaume Chatelet
8818e6ac6e Updating documentation part 1. v0.1.0 2018-02-09 17:04:20 +01:00
Guillaume Chatelet
6395af0fc6 Fixing MSVC build. 2018-02-09 14:50:12 +01:00
Guillaume Chatelet
4189efff92 Converts list_cpu_features to C 2018-02-09 10:08:23 +01:00
Guillaume Chatelet
11e3e20496 Reverting 338484f6f2. Fixes #2 2018-02-09 08:55:11 +01:00
Guillaume Chatelet
9f3b0241aa Fix typo in test makefile. 2018-02-08 17:08:52 +01:00
Guillaume Chatelet
3a156dada7 Fixes #14 - Defaulting to Release and no unit test 2018-02-08 16:59:18 +01:00
Guillaume Chatelet
1d6ba6139c Merge pull request #5 from bsurmanski/patch-1 
Fix spelling mistake for 'Cannon Lake'
 2018-02-08 16:34:15 +01:00
Guillaume Chatelet
338484f6f2 Fixes #2 - vpclmulqdq should be pclmulqdq. 2018-02-08 11:35:31 +01:00
Brandon Surmanski
efcc49a493 Fix spelling mistake for 'Cannon Lake' 
See:
https://www.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/platform-codenames.html
https://en.wikipedia.org/wiki/Cannon_Lake_(microarchitecture)
 2018-02-07 11:07:00 -08:00
Guillaume Chatelet
882fff1787 Remove unnecessary BUILD file. 2018-02-07 18:25:53 +01:00
Guillaume Chatelet
a1cf416c9b Add appveyor badge. 2018-02-02 09:43:56 +01:00
Guillaume Chatelet
dc6f0a7a1d Add appveyor configuration. 2018-02-02 09:36:33 +01:00
Guillaume Chatelet
dcefd46d08 Update README.md 2018-02-01 22:12:57 +01:00
Guillaume Chatelet
b50b7b5e08 Changing build folder so it doesn't conflict with BUILD file on OSX. 2018-02-01 14:04:49 +01:00
Guillaume Chatelet
b231aefa58 expand travis ci commands. 2018-02-01 13:46:33 +01:00
Guillaume Chatelet
b9ca19b8e6 Try to fix travis-ci on OSX. 2018-02-01 13:31:58 +01:00
Guillaume Chatelet
ebab23ac9a Adding travis ci configuration. 2018-02-01 11:42:40 +01:00
Guillaume Chatelet
8e58ef0d2b Removing THIRD_PARTY_ from C headers. 2018-02-01 10:38:48 +01:00
Guillaume Chatelet
439d371594 Adding code. Closes #0. 2018-02-01 10:03:09 +01:00
Guillaume Chatelet
44d56a0a28 Initial commit. 2018-01-31 15:17:13 +01:00