Guillaume Chatelet
fc7efb4c14
Fix Mips32 and add an alias for Mips32/64.
2019-01-16 14:26:18 +01:00
Guillaume Chatelet
d864585dc9
Update macros to detect mips64 and differentiate between x86 32/64.
2019-01-16 14:02:24 +01:00
fuzun
f6c8a5d92d
Revert "Different approach for -1 & true compliance"
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This reverts commit 58a232c560cbd5d341aeb67b890cbe263528a755.
2018-09-11 17:24:35 +03:00
fuzun
58a232c560
Different approach for -1 & true compliance
2018-09-08 05:56:35 +03:00
fuzun
f189298f4f
Revert "Change feature variables to unsigned int to fully comply with 'true' and 'false' & IsBitSet()"
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This reverts commit 319bd6f26be9232cc534e376f1d1ce50505394c2.
2018-09-08 05:16:00 +03:00
fuzun
68462fb78f
Suppress analysis warning
2018-08-30 06:22:54 +03:00
fuzun
319bd6f26b
Change feature variables to unsigned int to fully comply with 'true' and 'false' & IsBitSet()
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It seems that ' : 1' alignments cause signed integers to be either -1 or 0. While -1 is true and 0 is false reverse might not be always correct when true is defined 1.
Maybe change feature variables to bool ?
2018-08-30 06:11:35 +03:00
Guillaume Chatelet
26133d3b62
Match function definition and declaration arguments.
2018-06-20 09:18:57 +02:00
Guillaume Chatelet
d5e3985359
Delete .cpuinfo_ppc.h.swp
2018-05-15 10:46:12 +02:00
Rashmica Gupta
c45e32f812
powerpc: Add AT_PLATFORM and AT_BASE_PLATFORM
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Some PowerPC machines can operate in a mode that appears different
to a process than the actual hardware. AT_PLATFORM indicates the
supported instruction set and AT_BASE_PLATFORM indicates the
actual microarchitecture of the hardware.
Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
2018-05-15 14:24:58 +10:00
Rashmica Gupta
1c8bf0ecd8
hwcaps: Change uint32_t to unsigned long
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getauxval() returns an unsigned long which can be defined to be
more than 32 bits so don't force the result into a uint32_t.
Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
2018-05-15 14:24:53 +10:00
Rashmica Gupta
3adafbfe66
powerpc: Added PowerPC implementation
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Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
2018-05-15 14:24:45 +10:00
Arvid Gerstmann
d968991caa
Reformat files
2018-05-04 09:32:17 +02:00
Arvid Gerstmann
a1ffdcbe70
Explicitly namespace every extern identifier
2018-04-26 10:31:03 +02:00
Guillaume Chatelet
9b872ce0b2
Add cx16 (cmpxchg16b) cpuid flag. Fixes #30
2018-03-13 10:58:42 +01:00
Patrik Fiedler
3ee0d62e87
detect intel sgx and smx cpu features for the x86 arch
2018-02-13 11:16:48 +01:00
Guillaume Chatelet
e419573d10
Use CPU_FEATURES_ prefix for namespace macros.
2018-02-12 16:15:15 +01:00
Guillaume Chatelet
11e3e20496
Reverting 338484f6f2176c3d8ede0ed2f3fbd6cf1eb0274c. Fixes #2
2018-02-09 08:55:11 +01:00
Guillaume Chatelet
1d6ba6139c
Merge pull request #5 from bsurmanski/patch-1
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Fix spelling mistake for 'Cannon Lake'
2018-02-08 16:34:15 +01:00
Guillaume Chatelet
338484f6f2
Fixes #2 - vpclmulqdq should be pclmulqdq.
2018-02-08 11:35:31 +01:00
Brandon Surmanski
efcc49a493
Fix spelling mistake for 'Cannon Lake'
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See:
https://www.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/platform-codenames.html
https://en.wikipedia.org/wiki/Cannon_Lake_(microarchitecture)
2018-02-07 11:07:00 -08:00
Guillaume Chatelet
8e58ef0d2b
Removing THIRD_PARTY_ from C headers.
2018-02-01 10:38:48 +01:00
Guillaume Chatelet
439d371594
Adding code. Closes #0 .
2018-02-01 10:03:09 +01:00
