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Author SHA1 Message Date
Guillaume Chatelet
4bb7f87a8d
Merge pull request #51 from google/update_macros 
Update macros to detect mips64 and differentiate between x86 32/64.
 2019-01-16 14:47:40 +01:00
Guillaume Chatelet
fc7efb4c14 Fix Mips32 and add an alias for Mips32/64. 2019-01-16 14:26:18 +01:00
Guillaume Chatelet
d864585dc9 Update macros to detect mips64 and differentiate between x86 32/64. 2019-01-16 14:02:24 +01:00
Guillaume Chatelet
543e043c2a
Merge pull request #50 from google/try_travisci_windows_build 
Try travisci windows build
 2019-01-16 11:40:10 +01:00
Guillaume Chatelet
df12a0c1ab Compiler is MSVC by default 2019-01-16 11:06:38 +01:00
Guillaume Chatelet
1da4bf25c8 Test windows integration for travis-ci 2019-01-16 11:00:27 +01:00
Guillaume Chatelet
94838120ec
Merge pull request #49 from google/per_arch_build 
Per arch build and inlining of cpuid_x86.
 2019-01-15 17:36:05 +01:00
Guillaume Chatelet
98bd43ffce UNIX works for Unix like OS so no need to add APPLE. 2019-01-15 17:35:04 +01:00
Guillaume Chatelet
b3bb9048f4 Fix discovery of <sys/auxv.h> 2019-01-15 17:34:52 +01:00
Guillaume Chatelet
347065af95 Add AMD64 and i386/i686 to x86 detection 2019-01-15 15:30:43 +01:00
Guillaume Chatelet
122b067087 Use Cmake macros to detect getauxval and dlopen 2019-01-15 15:18:08 +01:00
Guillaume Chatelet
e8e5610fc4 Per arch build and inlining of cpuid_x86. 2019-01-15 10:52:56 +01:00
Guillaume Chatelet
b6e7c32c90
Merge pull request #48 from google/update_integration_scripts 
Declare CMAKE_SYSTEM_NAME/SYSTEM for Linaro builds
 2019-01-15 10:50:57 +01:00
Guillaume Chatelet
a897bf8057 Update shebang 2019-01-15 10:36:17 +01:00
Guillaume Chatelet
5177c6974f Declare CMAKE_SYSTEM_NAME/SYSTEM for Linaro builds 2019-01-15 10:19:06 +01:00
Guillaume Chatelet
78635347db
Merge pull request #42 from fuzun/master 
Small changes made according to static analyzer results
 2018-09-11 17:36:37 +02:00
fuzun
954eb4cc58 Revert "Cast added for macros in test for new IsBitSet" 
This reverts commit 78223d1be73c551ec75603166260841296ab41e2.
 2018-09-11 17:43:40 +03:00
fuzun
f6c8a5d92d Revert "Different approach for -1 & true compliance" 
This reverts commit 58a232c560cbd5d341aeb67b890cbe263528a755.
 2018-09-11 17:24:35 +03:00
fuzun
78223d1be7 Cast added for macros in test for new IsBitSet 2018-09-08 06:12:07 +03:00
fuzun
a23004e154 Merge branch 'master' of https://github.com/fuzun/cpu_features 2018-09-08 06:01:08 +03:00
fuzun
58a232c560 Different approach for -1 & true compliance 2018-09-08 05:56:35 +03:00
fuzun
7c1c91f9ea
Merge pull request #1 from google/master 
Sync with head
 2018-09-08 05:16:44 +03:00
fuzun
f189298f4f Revert "Change feature variables to unsigned int to fully comply with 'true' and 'false' & IsBitSet()" 
This reverts commit 319bd6f26be9232cc534e376f1d1ce50505394c2.
 2018-09-08 05:16:00 +03:00
Guillaume Chatelet
8ba03e9d24
Fix CI for Mips v0.2.0 2018-09-07 15:54:51 +02:00
Guillaume Chatelet
dab7cea707 Fix -Wunused-function warning. 2018-09-07 15:17:44 +02:00
fuzun
68462fb78f Suppress analysis warning 2018-08-30 06:22:54 +03:00
fuzun
9d9134cf0b Parantheses added to CPUID macro 2018-08-30 06:13:02 +03:00
fuzun
319bd6f26b Change feature variables to unsigned int to fully comply with 'true' and 'false' & IsBitSet() 
It seems that ' : 1' alignments cause signed integers to be either -1 or 0. While -1 is true and 0 is false reverse might not be always correct when true is defined 1.

Maybe change feature variables to bool ?
 2018-08-30 06:11:35 +03:00
Guillaume Chatelet
26133d3b62 Match function definition and declaration arguments. 2018-06-20 09:18:57 +02:00
Guillaume Chatelet
9f9a8d4b6e
Merge pull request #37 from psteinb/adding-missing-header 
without cpu_features_macros.h in the install tree, the library cannot
 2018-06-19 11:11:36 +02:00
Peter Steinbach
ce4637008d without cpu_features_macros.h in the install tree, the library cannot 
be used after `make install`
 2018-05-22 10:09:00 +02:00
Guillaume Chatelet
06d4f52f7e
Update README.md to add support for POWER. 2018-05-15 11:24:37 +02:00
Guillaume Chatelet
d5e3985359
Delete .cpuinfo_ppc.h.swp 2018-05-15 10:46:12 +02:00
Guillaume Chatelet
7e1035c5fc
Merge pull request #36 from RashmicaG/master 
Add Power support
 2018-05-15 10:42:42 +02:00
Rashmica Gupta
bc1066c128
travis: Add PowerPC jobs 
Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
 2018-05-15 14:25:03 +10:00
Rashmica Gupta
c45e32f812
powerpc: Add AT_PLATFORM and AT_BASE_PLATFORM 
Some PowerPC machines can operate in a mode that appears different
to a process than the actual hardware. AT_PLATFORM indicates the
supported instruction set and AT_BASE_PLATFORM indicates the
actual microarchitecture of the hardware.

Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
 2018-05-15 14:24:58 +10:00
Rashmica Gupta
1c8bf0ecd8
hwcaps: Change uint32_t to unsigned long 
getauxval() returns an unsigned long which can be defined to be
more than 32 bits so don't force the result into a uint32_t.

Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
 2018-05-15 14:24:53 +10:00
Rashmica Gupta
3adafbfe66
powerpc: Added PowerPC implementation 
Signed-off-by: Rashmica Gupta <rashmica.gupta@au1.ibm.com>
 2018-05-15 14:24:45 +10:00
Guillaume Chatelet
a5093bbe7c
Merge pull request #35 from Leandros/master 
Explicitly namespace every extern identifier
 2018-05-04 09:50:07 +02:00
Arvid Gerstmann
d968991caa Reformat files 2018-05-04 09:32:17 +02:00
Arvid Gerstmann
235d57c591 Fix failing tests on Linux & Android 2018-05-04 09:30:32 +02:00
Arvid Gerstmann
8d726f81f0 Merge remote-tracking branch 'original/master' 2018-05-04 09:26:13 +02:00
Guillaume Chatelet
6cfe2326b6
Fix missing line feed in .clang-format 2018-05-04 08:46:51 +02:00
Arvid Gerstmann
fd4839032c Fix tests & fix missing GetHardwareCapabilities() change 2018-05-03 17:07:07 +02:00
Arvid Gerstmann
a1ffdcbe70 Explicitly namespace every extern identifier 2018-04-26 10:31:03 +02:00
Guillaume Chatelet
7eca4a7a39
Merge pull request #33 from google/json_output2 
Add JSON output. Fixes #24
 2018-03-27 15:53:06 +02:00
Guillaume Chatelet
07fd90d4f5 Add JSON output. Fixes #24 2018-03-27 15:28:40 +02:00
Guillaume Chatelet
9b872ce0b2 Add cx16 (cmpxchg16b) cpuid flag. Fixes #30 2018-03-13 10:58:42 +01:00
Guillaume Chatelet
68479a8cf9 Fixing unneeded whitespaces 2018-02-21 10:15:22 +01:00
Guillaume Chatelet
9c56b0385e
Merge pull request #27 from google/cross_compilation 
Adding cross compilation. Fixes #13.
 2018-02-16 17:11:54 +01:00