mirror of
https://github.com/google/cpu_features.git
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0d5f398c58
* Add macros for LOONGARCH hwcaps * Update hwcaps.h * LoongArch Support * Remove unused definitions. * Add ignored feature in test.
180 lines
5.0 KiB
C++
180 lines
5.0 KiB
C++
// Copyright 2022 Google LLC
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "cpuinfo_loongarch.h"
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#include "filesystem_for_testing.h"
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#include "gtest/gtest.h"
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#include "hwcaps_for_testing.h"
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namespace cpu_features {
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namespace {
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TEST(CpuinfoLoongArchvTest, UnknownFromCpuInfo) {
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ResetHwcaps();
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auto& fs = GetEmptyFilesystem();
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fs.CreateFile("/proc/cpuinfo", R"(
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system type : generic-loongson-machine
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processor : 0
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package : 0
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core : 0
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CPU Family : Loongson-64bit
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Model Name : Loongson-3A5000-HV
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CPU Revision : 0x11
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FPU Revision : 0x00
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CPU MHz : 2500.00
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BogoMIPS : 5000.00
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TLB Entries : 2112
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Address Sizes : 48 bits physical, 48 bits virtual
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ISA : loongarch32 loongarch64
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Features : cpucfg lam ual fpu lsx lasx crc32 complex crypto lvz lbt_x86 lbt_arm lbt_mips
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Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 8
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processor : 1
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package : 0
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core : 1
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CPU Family : Loongson-64bit
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Model Name : Loongson-3A5000-HV
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CPU Revision : 0x11
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FPU Revision : 0x00
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CPU MHz : 2500.00
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BogoMIPS : 5000.00
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TLB Entries : 2112
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Address Sizes : 48 bits physical, 48 bits virtual
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ISA : loongarch32 loongarch64
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Features : cpucfg lam ual fpu lsx lasx crc32 complex crypto lvz lbt_x86 lbt_arm lbt_mips
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Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 8
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processor : 2
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package : 0
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core : 2
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CPU Family : Loongson-64bit
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Model Name : Loongson-3A5000-HV
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CPU Revision : 0x11
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FPU Revision : 0x00
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CPU MHz : 2500.00
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BogoMIPS : 5000.00
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TLB Entries : 2112
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Address Sizes : 48 bits physical, 48 bits virtual
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ISA : loongarch32 loongarch64
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Features : cpucfg lam ual fpu lsx lasx crc32 complex crypto lvz lbt_x86 lbt_arm lbt_mips
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Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 8
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processor : 3
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package : 0
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core : 3
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CPU Family : Loongson-64bit
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Model Name : Loongson-3A5000-HV
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CPU Revision : 0x11
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FPU Revision : 0x00
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CPU MHz : 2500.00
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BogoMIPS : 5000.00
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TLB Entries : 2112
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Address Sizes : 48 bits physical, 48 bits virtual
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ISA : loongarch32 loongarch64
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Features : cpucfg lam ual fpu lsx lasx crc32 complex crypto lvz lbt_x86 lbt_arm lbt_mips
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Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 8)");
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const auto info = GetLoongArchInfo();
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EXPECT_FALSE(info.features.CPUCFG);
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EXPECT_TRUE(info.features.LAM);
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EXPECT_TRUE(info.features.UAL);
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EXPECT_TRUE(info.features.FPU);
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EXPECT_TRUE(info.features.LSX);
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EXPECT_TRUE(info.features.LASX);
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EXPECT_TRUE(info.features.CRC32);
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EXPECT_TRUE(info.features.COMPLEX);
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EXPECT_TRUE(info.features.CRYPTO);
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EXPECT_TRUE(info.features.LVZ);
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EXPECT_TRUE(info.features.LBT_X86);
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EXPECT_TRUE(info.features.LBT_ARM);
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EXPECT_TRUE(info.features.LBT_MIPS);
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}
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TEST(CpuinfoLoongArchvTest, QemuCpuInfo) {
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ResetHwcaps();
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auto& fs = GetEmptyFilesystem();
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fs.CreateFile("/proc/cpuinfo", R"(
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system type : generic-loongson-machine
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processor : 0
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package : 0
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core : 0
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CPU Family : Loongson-64bit
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Model Name : Loongson-3A5000
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CPU Revision : 0x10
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FPU Revision : 0x01
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CPU MHz : 2000.00
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BogoMIPS : 4000.00
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TLB Entries : 2112
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Address Sizes : 48 bits physical, 48 bits virtual
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ISA : loongarch32 loongarch64
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Features : cpucfg lam ual fpu crc32
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Hardware Watchpoint : yes, iwatch count: 0, dwatch count: 0
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processor : 1
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package : 0
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core : 1
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CPU Family : Loongson-64bit
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Model Name : Loongson-3A5000
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CPU Revision : 0x10
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FPU Revision : 0x01
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CPU MHz : 2000.00
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BogoMIPS : 4000.00
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TLB Entries : 2112
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Address Sizes : 48 bits physical, 48 bits virtual
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ISA : loongarch32 loongarch64
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Features : cpucfg lam ual fpu crc32
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Hardware Watchpoint : yes, iwatch count: 0, dwatch count: 0
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processor : 2
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package : 0
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core : 2
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CPU Family : Loongson-64bit
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Model Name : Loongson-3A5000
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CPU Revision : 0x10
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FPU Revision : 0x01
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CPU MHz : 2000.00
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BogoMIPS : 4000.00
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TLB Entries : 2112
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Address Sizes : 48 bits physical, 48 bits virtual
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ISA : loongarch32 loongarch64
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Features : cpucfg lam ual fpu crc32
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Hardware Watchpoint : yes, iwatch count: 0, dwatch count: 0
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processor : 3
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package : 0
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core : 3
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CPU Family : Loongson-64bit
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Model Name : Loongson-3A5000
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CPU Revision : 0x10
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FPU Revision : 0x01
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CPU MHz : 2000.00
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BogoMIPS : 4000.00
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TLB Entries : 2112
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Address Sizes : 48 bits physical, 48 bits virtual
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ISA : loongarch32 loongarch64
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Features : cpucfg lam ual fpu crc32
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Hardware Watchpoint : yes, iwatch count: 0, dwatch count: 0)");
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const auto info = GetLoongArchInfo();
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EXPECT_FALSE(info.features.CPUCFG);
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EXPECT_TRUE(info.features.LAM);
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EXPECT_TRUE(info.features.UAL);
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EXPECT_TRUE(info.features.FPU);
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EXPECT_TRUE(info.features.CRC32);
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}
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} // namespace
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} // namespace cpu_features
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