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* add Ice Lake Server and Sapphire Rapids models The information contained in this commit was obtained from "Intel® Architecture Instruction Set Extensions and Future Features Programming Reference" document 319433-040 from https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html Signed-off-by: Jeff Hammond <jeff.r.hammond@intel.com> * Tiger Lake; Ice Lake NNP-I; SPR string Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com> * add AVX512_BF16 and AVX512_VP2INTERSECT detection Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com> * correction for KNM features: s/4VBMI2/4FMAPS/g Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com> * add AMX/TMUL bits from 319433-040 Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com> * add Intel copyright Fixes #128