Dr.-Ing. Patrick Siegl 6482bad213 Added RPI zero with its features HALF, THUMB, FASTMULT, EDSP, JAVA and TLS (#75)

2019-06-18 12:53:08 +02:00

..

internal

Added RPI zero with its features HALF, THUMB, FASTMULT, EDSP, JAVA and TLS (#75)

2019-06-18 12:53:08 +02:00

cpu_features_macros.h

Fix Mips32 and add an alias for Mips32/64.

2019-01-16 14:26:18 +01:00

cpuinfo_aarch64.h

Guarding header use with architecture (#56)

2019-01-18 13:38:22 +01:00

cpuinfo_arm.h

Added RPI zero with its features HALF, THUMB, FASTMULT, EDSP, JAVA and TLS (#75)

2019-06-18 12:53:08 +02:00

cpuinfo_mips.h

add r6 flag (#57)

2019-01-22 11:00:48 +01:00

cpuinfo_ppc.h

Guarding header use with architecture (#56)

2019-01-18 13:38:22 +01:00

cpuinfo_x86.h

Support x86 features: FPU, TSC, CX8, CLFSH, MMX, VAES, HLE, RTM, RDSEED, CLFLUSHOPT, CLWB, SSE, SSE2, SSE3, PCLMULQDQ (#73)

2019-06-13 11:53:39 +02:00