cpu_features

mirror of https://github.com/google/cpu_features.git synced 2025-04-28 15:33:37 +02:00

History

detect future Intel AVX/AMX features (#124 )

* add Ice Lake Server and Sapphire Rapids models

The information contained in this commit was obtained from
"Intel® Architecture Instruction Set Extensions and Future Features Programming Reference" document 319433-040 from
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Signed-off-by: Jeff Hammond <jeff.r.hammond@intel.com>

* Tiger Lake; Ice Lake NNP-I; SPR string

Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com>

* add AVX512_BF16 and AVX512_VP2INTERSECT detection

Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com>

* correction for KNM features: s/4VBMI2/4FMAPS/g

Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com>

* add AMX/TMUL bits from 319433-040

Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com>

* add Intel copyright

Fixes #128

2020-09-21 07:56:26 +00:00

internal

Update features for AArch64 to Linux 5.8 (#122 )

2020-09-21 07:50:38 +00:00

cpu_features_cache_info.h

Add support for leaf2 and leaf4 on Intel's x86 arch (#80 )

2019-07-02 16:52:25 +02:00

cpu_features_macros.h

Fix case in CPU_FEATURES_COMPILED_X86_AVX2 (Fix #102 )

2020-01-29 11:00:11 +01:00

cpuinfo_aarch64.h

Update features for AArch64 to Linux 5.8 (#122 )