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122 lines
3.6 KiB
C
122 lines
3.6 KiB
C
// Copyright 2017 Google LLC
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef CPU_FEATURES_INCLUDE_CPUINFO_ARM_H_
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#define CPU_FEATURES_INCLUDE_CPUINFO_ARM_H_
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#include <stdint.h> // uint32_t
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#include "cpu_features_cache_info.h"
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#include "cpu_features_macros.h"
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CPU_FEATURES_START_CPP_NAMESPACE
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typedef struct {
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int swp : 1; // SWP instruction (atomic read-modify-write)
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int half : 1; // Half-word loads and stores
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int thumb : 1; // Thumb (16-bit instruction set)
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int _26bit : 1; // "26 Bit" Model (Processor status register folded into
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// program counter)
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int fastmult : 1; // 32x32->64-bit multiplication
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int fpa : 1; // Floating point accelerator
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int vfp : 1; // Vector Floating Point.
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int edsp : 1; // DSP extensions (the 'e' variant of the ARM9 CPUs, and all
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// others above)
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int java : 1; // Jazelle (Java bytecode accelerator)
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int iwmmxt : 1; // Intel Wireless MMX Technology.
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int crunch : 1; // MaverickCrunch coprocessor
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int thumbee : 1; // ThumbEE
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int neon : 1; // Advanced SIMD.
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int vfpv3 : 1; // VFP version 3
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int vfpv3d16 : 1; // VFP version 3 with 16 D-registers
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int tls : 1; // TLS register
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int vfpv4 : 1; // VFP version 4 with fast context switching
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int idiva : 1; // SDIV and UDIV hardware division in ARM mode.
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int idivt : 1; // SDIV and UDIV hardware division in Thumb mode.
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int vfpd32 : 1; // VFP with 32 D-registers
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int lpae : 1; // Large Physical Address Extension (>4GB physical memory on
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// 32-bit architecture)
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int evtstrm : 1; // kernel event stream using generic architected timer
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int aes : 1; // Hardware-accelerated Advanced Encryption Standard.
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int pmull : 1; // Polynomial multiply long.
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int sha1 : 1; // Hardware-accelerated SHA1.
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int sha2 : 1; // Hardware-accelerated SHA2-256.
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int crc32 : 1; // Hardware-accelerated CRC-32.
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// Make sure to update ArmFeaturesEnum below if you add a field here.
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} ArmFeatures;
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typedef struct {
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ArmFeatures features;
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int implementer;
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int architecture;
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int variant;
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int part;
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int revision;
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} ArmInfo;
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// TODO(user): Add macros to know which features are present at compile
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// time.
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ArmInfo GetArmInfo(void);
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// Compute CpuId from ArmInfo.
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uint32_t GetArmCpuId(const ArmInfo* const info);
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////////////////////////////////////////////////////////////////////////////////
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// Introspection functions
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typedef enum {
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ARM_SWP,
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ARM_HALF,
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ARM_THUMB,
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ARM_26BIT,
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ARM_FASTMULT,
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ARM_FPA,
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ARM_VFP,
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ARM_EDSP,
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ARM_JAVA,
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ARM_IWMMXT,
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ARM_CRUNCH,
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ARM_THUMBEE,
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ARM_NEON,
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ARM_VFPV3,
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ARM_VFPV3D16,
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ARM_TLS,
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ARM_VFPV4,
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ARM_IDIVA,
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ARM_IDIVT,
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ARM_VFPD32,
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ARM_LPAE,
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ARM_EVTSTRM,
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ARM_AES,
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ARM_PMULL,
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ARM_SHA1,
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ARM_SHA2,
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ARM_CRC32,
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ARM_LAST_,
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} ArmFeaturesEnum;
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int GetArmFeaturesEnumValue(const ArmFeatures* features, ArmFeaturesEnum value);
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const char* GetArmFeaturesEnumName(ArmFeaturesEnum);
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CPU_FEATURES_END_CPP_NAMESPACE
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#if !defined(CPU_FEATURES_ARCH_ARM)
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#error "Including cpuinfo_arm.h from a non-arm target."
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#endif
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#endif // CPU_FEATURES_INCLUDE_CPUINFO_ARM_H_
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