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Jeff Hammond e698327713
add future Intel microarchitectures (#123) 
* add Ice Lake Server and Sapphire Rapids models

The information contained in this commit was obtained from
"Intel® Architecture Instruction Set Extensions and Future Features Programming Reference" document 319433-040 from
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Signed-off-by: Jeff Hammond <jeff.r.hammond@intel.com>

* Tiger Lake; Ice Lake NNP-I; SPR string

Signed-off-by: Hammond, Jeff R <jeff.r.hammond@intel.com>

* add Intel copyright

Fix #127
2020-09-21 07:54:58 +00:00
..
internal
Update features for AArch64 to Linux 5.8 (#122)
2020-09-21 07:50:38 +00:00
cpu_features_cache_info.h
Add support for leaf2 and leaf4 on Intel's x86 arch (#80)
2019-07-02 16:52:25 +02:00
cpu_features_macros.h
Fix case in CPU_FEATURES_COMPILED_X86_AVX2 (Fix #102)
2020-01-29 11:00:11 +01:00
cpuinfo_aarch64.h
Update features for AArch64 to Linux 5.8 (#122)
2020-09-21 07:50:38 +00:00
cpuinfo_arm.h
Add support for leaf2 and leaf4 on Intel's x86 arch (#80)
2019-07-02 16:52:25 +02:00
cpuinfo_mips.h
Add support for leaf2 and leaf4 on Intel's x86 arch (#80)
2019-07-02 16:52:25 +02:00
cpuinfo_ppc.h
Add support for leaf2 and leaf4 on Intel's x86 arch (#80)
2019-07-02 16:52:25 +02:00
cpuinfo_x86.h
add future Intel microarchitectures (#123)
2020-09-21 07:54:58 +00:00