1
0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-06 00:00:40 +02:00

spi25_statusreg: delete spi_read_status_register()

Delete the spi_read_status_register() function because the generic
spi_read_register() function can be used instead.

This patch also converts all call sites over to spi_read_register().
A side effect is that error codes are now properly propagated and
checked.

BUG=b:195381327,b:153800563
BRANCH=none
TEST=flashrom -{r,w,E}
TEST=Tested with a W25Q128.W flash on a kasumi (AMD) dut.
     Read SR1/SR2 with --wp-status and activated various WP ranges
     that toggled bits in both SR1 and SR2.

Change-Id: I146b4b5439872e66c5d33e156451a729d248c7da
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59529
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Nikolai Artemiev
2021-10-28 16:18:28 +11:00
committed by Edward O'Callaghan
parent e5389d1b8f
commit 005d32b7b7
5 changed files with 141 additions and 46 deletions

View File

@ -62,8 +62,6 @@ int spi_set_extended_address(struct flashctx *, uint8_t addr_high);
/* spi25_statusreg.c */
/* FIXME: replace spi_read_status_register() calls with spi_read_register() */
uint8_t spi_read_status_register(const struct flashctx *flash);
int spi_read_register(const struct flashctx *flash, enum flash_reg reg, uint8_t *value);
int spi_write_register(const struct flashctx *flash, enum flash_reg reg, uint8_t value);
void spi_prettyprint_status_register_bit(uint8_t status, int bit);