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spi25_statusreg: delete spi_read_status_register()

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Delete the spi_read_status_register() function because the generic
spi_read_register() function can be used instead.

This patch also converts all call sites over to spi_read_register().
A side effect is that error codes are now properly propagated and
checked.

BUG=b:195381327,b:153800563
BRANCH=none
TEST=flashrom -{r,w,E}
TEST=Tested with a W25Q128.W flash on a kasumi (AMD) dut.
     Read SR1/SR2 with --wp-status and activated various WP ranges
     that toggled bits in both SR1 and SR2.

Change-Id: I146b4b5439872e66c5d33e156451a729d248c7da
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59529
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Nikolai Artemiev
2021-10-28 16:18:28 +11:00
committed by Edward O'Callaghan
parent e5389d1b8f
commit 005d32b7b7
5 changed files with 141 additions and 46 deletions
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17
it87spi.c
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@@ -133,9 +133,20 @@ static int it8716f_spi_page_program(struct flashctx *flash, const uint8_t *buf,
OUTB(0, data->flashport);
/* Wait until the Write-In-Progress bit is cleared.
* This usually takes 1-10 ms, so wait in 1 ms steps.
*
* FIXME: This should timeout after some number of retries.
*/
while (spi_read_status_register(flash) & SPI_SR_WIP)
while (true) {
uint8_t status;
int ret = spi_read_register(flash, STATUS1, &status);
if (ret)
return ret;
if((status & SPI_SR_WIP) == 0)
return 0;
programmer_delay(1000);
}
return 0;
}
@@ -277,7 +288,9 @@ static int it8716f_spi_chip_write_256(struct flashctx *flash, const uint8_t *buf
}
while (len >= chip->page_size) {
it8716f_spi_page_program(flash, buf, start);
int ret = it8716f_spi_page_program(flash, buf, start);
if (ret)
return ret;
start += chip->page_size;
len -= chip->page_size;
buf += chip->page_size;