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ch347_spi: Add spi clock frequency selection

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CH347 SPI interface supports up to 60M.
For example, to set a 30M spi rate, use -p ch347_spi:spispeed=30M.

Change-Id: If2be48929db540a6598ac0b60b37e64597156db7
Signed-off-by: ZhiYuanNJ Liu <871238103@qq.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/82776
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
ZhiYuanNJ
2024-06-03 15:38:05 +08:00
committed by Anastasia Klimchuk
parent 6ccfef8ccd
commit 00e02a6184
2 changed files with 46 additions and 5 deletions
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10
doc/classic_cli_manpage.rst
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@ -1035,8 +1035,14 @@ as per the device.
ch347_spi programmer
^^^^^^^^^^^^^^^^^^^^
The WCH CH347 programmer does not currently support any parameters. SPI frequency is fixed at 2 MHz, and CS0 is used
as per the device.
An optional ``spispeed`` parameter could be used to specify the SPI speed. This parameter is available for the CH347T and CH347F device.
The default SPI speed is 15MHz if no value is specified.
Syntax is::
flashrom -p ch347_spi:spispeed=value
where ``value`` can be ``60M``, ``30M``, ``15M``, ``7.5M``, ``3.75M``, ``1.875M``, ``937.5K``, ``468.75K``.
ni845x_spi programmer
^^^^^^^^^^^^^^^^^^^^^