openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00
Code Issues Releases Wiki Activity

FreeBSD definitions of (read|write)[bwl] collide with our own

Browse Source 
Before we attempt trickery, we can simply rename the accessor functions.

Patch created with the help of Coccinelle.

Corresponding to flashrom svn r420 and coreboot v2 svn r3984.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Carl-Daniel Hailfinger
2009-03-06 22:26:00 +00:00
parent b88556979b
commit 0472f3d826
17 changed files with 348 additions and 348 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
w39v040c.c
View File

@ -26,22 +26,22 @@ int probe_w39v040c(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2, lock;
writeb(0xAA, bios + 0x5555);
chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10);
writeb(0x55, bios + 0x2AAA);
chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10);
writeb(0x90, bios + 0x5555);
chip_writeb(0x90, bios + 0x5555);
myusec_delay(10);
id1 = readb(bios);
id2 = readb(bios + 1);
lock = readb(bios + 0xfff2);
id1 = chip_readb(bios);
id2 = chip_readb(bios + 1);
lock = chip_readb(bios + 0xfff2);
writeb(0xAA, bios + 0x5555);
chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10);
writeb(0x55, bios + 0x2AAA);
chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10);
writeb(0xF0, bios + 0x5555);
chip_writeb(0xF0, bios + 0x5555);
myusec_delay(40);
printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2);