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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 15:12:36 +02:00

ft2232_spi: allow 5x clock divisor to be set at runtime

Check at init time whether the chip is a type 'H' (FT2232H or FT4232H).
If not, omit the disable-divide-by-5 (0x8a) command which can confuse
older chips.

Corresponding to flashrom svn r1229.

Signed-off-by: Alex Badea <vamposdecampos@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:
Alex Badea 2010-11-10 03:18:41 +00:00 committed by Carl-Daniel Hailfinger
parent b9556e0fd4
commit 0b94d05c23

View File

@ -46,11 +46,11 @@ const struct usbdev_status devs_ft2232spi[] = {
* The 'H' chips can run internally at either 12MHz or 60MHz. * The 'H' chips can run internally at either 12MHz or 60MHz.
* The non-H chips can only run at 12MHz. * The non-H chips can only run at 12MHz.
*/ */
#define CLOCK_5X 1 static uint8_t clock_5x = 1;
/* /*
* In either case, the divisor is a simple integer clock divider. * In either case, the divisor is a simple integer clock divider.
* If CLOCK_5X is set, this divisor divides 30MHz, else it divides 6MHz. * If clock_5x is set, this divisor divides 30MHz, else it divides 6MHz.
*/ */
#define DIVIDE_BY 3 /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */ #define DIVIDE_BY 3 /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */
@ -131,6 +131,7 @@ int ft2232_spi_init(void)
int ft2232_type = FTDI_FT4232H_PID; int ft2232_type = FTDI_FT4232H_PID;
enum ftdi_interface ft2232_interface = INTERFACE_B; enum ftdi_interface ft2232_interface = INTERFACE_B;
char *arg; char *arg;
double mpsse_clk;
arg = extract_programmer_param("type"); arg = extract_programmer_param("type");
if (arg) { if (arg) {
@ -186,6 +187,12 @@ int ft2232_spi_init(void)
exit(-1); // TODO exit(-1); // TODO
} }
if (ftdic->type != TYPE_2232H && ftdic->type != TYPE_4232H) {
msg_pdbg("FTDI chip type %d is not high-speed\n",
ftdic->type);
clock_5x = 0;
}
if (ftdi_set_interface(ftdic, ft2232_interface) < 0) { if (ftdi_set_interface(ftdic, ft2232_interface) < 0) {
msg_perr("Unable to select interface: %s\n", msg_perr("Unable to select interface: %s\n",
ftdic->error_str); ftdic->error_str);
@ -207,18 +214,16 @@ int ft2232_spi_init(void)
msg_perr("Unable to set bitmode to SPI\n"); msg_perr("Unable to set bitmode to SPI\n");
} }
#if CLOCK_5X if (clock_5x) {
msg_pdbg("Disable divide-by-5 front stage\n"); msg_pdbg("Disable divide-by-5 front stage\n");
buf[0] = 0x8a; /* Disable divide-by-5. */ buf[0] = 0x8a; /* Disable divide-by-5. */
if (send_buf(ftdic, buf, 1)) if (send_buf(ftdic, buf, 1))
return -1; return -1;
#define MPSSE_CLK 60.0 mpsse_clk = 60.0;
} else {
mpsse_clk = 12.0;
}
#else
#define MPSSE_CLK 12.0
#endif
msg_pdbg("Set clock divisor\n"); msg_pdbg("Set clock divisor\n");
buf[0] = 0x86; /* command "set divisor" */ buf[0] = 0x86; /* command "set divisor" */
/* valueL/valueH are (desired_divisor - 1) */ /* valueL/valueH are (desired_divisor - 1) */
@ -227,8 +232,10 @@ int ft2232_spi_init(void)
if (send_buf(ftdic, buf, 3)) if (send_buf(ftdic, buf, 3))
return -1; return -1;
msg_pdbg("SPI clock is %fMHz\n", msg_pdbg("MPSSE clock: %f MHz divisor: %d "
(double)(MPSSE_CLK / (((DIVIDE_BY - 1) + 1) * 2))); "SPI clock: %f MHz\n",
mpsse_clk, DIVIDE_BY,
(double)(mpsse_clk / (((DIVIDE_BY - 1) + 1) * 2)));
/* Disconnect TDI/DO to TDO/DI for loopback. */ /* Disconnect TDI/DO to TDO/DI for loopback. */
msg_pdbg("No loopback of TDI/DO TDO/DI\n"); msg_pdbg("No loopback of TDI/DO TDO/DI\n");