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ft2232_spi: allow 5x clock divisor to be set at runtime
Check at init time whether the chip is a type 'H' (FT2232H or FT4232H). If not, omit the disable-divide-by-5 (0x8a) command which can confuse older chips. Corresponding to flashrom svn r1229. Signed-off-by: Alex Badea <vamposdecampos@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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0b94d05c23
37
ft2232_spi.c
37
ft2232_spi.c
@ -46,11 +46,11 @@ const struct usbdev_status devs_ft2232spi[] = {
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* The 'H' chips can run internally at either 12MHz or 60MHz.
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* The 'H' chips can run internally at either 12MHz or 60MHz.
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* The non-H chips can only run at 12MHz.
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* The non-H chips can only run at 12MHz.
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*/
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*/
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#define CLOCK_5X 1
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static uint8_t clock_5x = 1;
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/*
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/*
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* In either case, the divisor is a simple integer clock divider.
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* In either case, the divisor is a simple integer clock divider.
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* If CLOCK_5X is set, this divisor divides 30MHz, else it divides 6MHz.
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* If clock_5x is set, this divisor divides 30MHz, else it divides 6MHz.
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*/
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*/
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#define DIVIDE_BY 3 /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */
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#define DIVIDE_BY 3 /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */
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@ -131,6 +131,7 @@ int ft2232_spi_init(void)
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int ft2232_type = FTDI_FT4232H_PID;
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int ft2232_type = FTDI_FT4232H_PID;
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enum ftdi_interface ft2232_interface = INTERFACE_B;
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enum ftdi_interface ft2232_interface = INTERFACE_B;
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char *arg;
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char *arg;
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double mpsse_clk;
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arg = extract_programmer_param("type");
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arg = extract_programmer_param("type");
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if (arg) {
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if (arg) {
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@ -186,6 +187,12 @@ int ft2232_spi_init(void)
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exit(-1); // TODO
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exit(-1); // TODO
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}
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}
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if (ftdic->type != TYPE_2232H && ftdic->type != TYPE_4232H) {
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msg_pdbg("FTDI chip type %d is not high-speed\n",
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ftdic->type);
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clock_5x = 0;
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}
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if (ftdi_set_interface(ftdic, ft2232_interface) < 0) {
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if (ftdi_set_interface(ftdic, ft2232_interface) < 0) {
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msg_perr("Unable to select interface: %s\n",
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msg_perr("Unable to select interface: %s\n",
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ftdic->error_str);
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ftdic->error_str);
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@ -207,18 +214,16 @@ int ft2232_spi_init(void)
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msg_perr("Unable to set bitmode to SPI\n");
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msg_perr("Unable to set bitmode to SPI\n");
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}
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}
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#if CLOCK_5X
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if (clock_5x) {
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msg_pdbg("Disable divide-by-5 front stage\n");
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msg_pdbg("Disable divide-by-5 front stage\n");
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buf[0] = 0x8a; /* Disable divide-by-5. */
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buf[0] = 0x8a; /* Disable divide-by-5. */
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if (send_buf(ftdic, buf, 1))
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if (send_buf(ftdic, buf, 1))
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return -1;
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return -1;
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#define MPSSE_CLK 60.0
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mpsse_clk = 60.0;
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} else {
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mpsse_clk = 12.0;
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}
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#else
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#define MPSSE_CLK 12.0
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#endif
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msg_pdbg("Set clock divisor\n");
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msg_pdbg("Set clock divisor\n");
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buf[0] = 0x86; /* command "set divisor" */
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buf[0] = 0x86; /* command "set divisor" */
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/* valueL/valueH are (desired_divisor - 1) */
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/* valueL/valueH are (desired_divisor - 1) */
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@ -227,8 +232,10 @@ int ft2232_spi_init(void)
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if (send_buf(ftdic, buf, 3))
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if (send_buf(ftdic, buf, 3))
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return -1;
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return -1;
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msg_pdbg("SPI clock is %fMHz\n",
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msg_pdbg("MPSSE clock: %f MHz divisor: %d "
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(double)(MPSSE_CLK / (((DIVIDE_BY - 1) + 1) * 2)));
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"SPI clock: %f MHz\n",
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mpsse_clk, DIVIDE_BY,
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(double)(mpsse_clk / (((DIVIDE_BY - 1) + 1) * 2)));
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/* Disconnect TDI/DO to TDO/DI for loopback. */
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/* Disconnect TDI/DO to TDO/DI for loopback. */
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msg_pdbg("No loopback of TDI/DO TDO/DI\n");
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msg_pdbg("No loopback of TDI/DO TDO/DI\n");
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