mirror of
https://review.coreboot.org/flashrom.git
synced 2025-07-02 06:23:18 +02:00
Add ids and chip entry for Spansion S25FL016A, tested, working
Corresponding to flashrom svn r187 and coreboot v2 svn r3074. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
This commit is contained in:

committed by
Carl-Daniel Hailfinger

parent
e5dd6e6cd5
commit
10e091bd30
8
flash.h
8
flash.h
@ -165,6 +165,14 @@ extern struct flashchip flashchips[];
|
||||
#define SHARP_ID 0xB0 /* Sharp */
|
||||
#define SHARP_LHF00L04 0xCF
|
||||
|
||||
/*
|
||||
* Spansion was previously a joint venture of AMD and Fujitsu.
|
||||
* S25 chips are SPI. The first device ID byte is memory type and
|
||||
* the second device ID byte is memory capacity.
|
||||
*/
|
||||
#define SPANSION_ID 0x01 /* Spansion */
|
||||
#define SPANSION_S25FL016A 0x0214
|
||||
|
||||
/*
|
||||
* SST25 chips are SPI, first byte of device ID is memory type, second
|
||||
* byte of device ID is related to log(bitsize) at least for some chips.
|
||||
|
Reference in New Issue
Block a user