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Add Gemini Lake support

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The SPI hardware is pretty much unchanged from Apollo Lake. However, the
IFD differs significantly enough to require special handling.

Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: Ib5dcdf204166f44a8531c19b5f363b851d2ccd77
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54276
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
2020-07-10 17:04:10 +02:00
committed by David Hendricks
parent 90739d147f
commit 11a35980de
6 changed files with 37 additions and 7 deletions
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3
util/ich_descriptors_tool/ich_descriptors_tool.c
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@ -127,6 +127,7 @@ static void usage(char *argv[], const char *error)
"\t- \"ich10\",\n"
"\t- \"silvermont\" for chipsets from Intel's Silvermont architecture (e.g. Bay Trail),\n"
"\t- \"apollo\" for Intel's Apollo Lake SoC.\n"
"\t- \"gemini\" for Intel's Gemini Lake SoC.\n"
"\t- \"5\" or \"ibex\" for Intel's 5 series chipsets,\n"
"\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n"
"\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n"
@ -230,6 +231,8 @@ int main(int argc, char *argv[])
cs = CHIPSET_400_SERIES_COMET_POINT;
else if (strcmp(csn, "apollo") == 0)
cs = CHIPSET_APOLLO_LAKE;
else if (strcmp(csn, "gemini") == 0)
cs = CHIPSET_GEMINI_LAKE;
}
ret = read_ich_descriptors_from_dump(buf, len, &cs, &desc);