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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 14:33:18 +02:00

ichspi: Add RaptorPoint PCH support

Based on public Intel 700 Series PCH datasheet, DOC 743835 rev 004.

The IDs of IoT chipset SKUs (ending with E) can only be found in "12th
Gen Intel® Core™ Processors Family (Formerly Known as Alder Lake -S)
for IoT Platforms External Design Specification (EDS) Addendum" DOC
634528 rev 2.7 (NDA).

TEST=Probe flash on Z790 chipset. Run the ich_descriptors_tool and
check the output is correct as expected.

Change-Id: I13ac52d5400c0e2260e12d605077fc2182c379ef
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/83854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
This commit is contained in:
Michał Żygowski
2023-06-19 09:36:52 +02:00
committed by Anastasia Klimchuk
parent 14f121e39e
commit 11d5c1750f
6 changed files with 45 additions and 2 deletions

View File

@ -606,6 +606,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_ELKHART_LAKE:
@ -714,6 +715,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
break;
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
@ -751,6 +753,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_700_SERIES_RAPTOR_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_PANTHER_LAKE:
case CHIPSET_APOLLO_LAKE:
@ -1023,6 +1026,11 @@ static int enable_flash_pch600(const struct programmer_cfg *cfg, struct pci_dev
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_600_SERIES_ALDER_POINT);
}
static int enable_flash_pch700(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_700_SERIES_RAPTOR_POINT);
}
static int enable_flash_mtl(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_METEOR_LAKE);
@ -2196,9 +2204,19 @@ const struct penable chipset_enables[] = {
{0x8086, 0x7a83, B_S, NT, "Intel", "Q670", enable_flash_pch600},
{0x8086, 0x7a84, B_S, DEP, "Intel", "Z690", enable_flash_pch600},
{0x8086, 0x7a88, B_S, NT, "Intel", "W680", enable_flash_pch600},
{0x8086, 0x7a8a, B_S, NT, "Intel", "W685", enable_flash_pch600},
{0x8086, 0x7a8d, B_S, NT, "Intel", "WM690", enable_flash_pch600},
{0x8086, 0x7a8c, B_S, NT, "Intel", "HM670", enable_flash_pch600},
{0x8086, 0x7a90, B_S, NT, "Intel", "R680E", enable_flash_pch600},
{0x8086, 0x7a91, B_S, NT, "Intel", "Q670E", enable_flash_pch600},
{0x8086, 0x7a92, B_S, NT, "Intel", "H610E", enable_flash_pch600},
{0x8086, 0x7a8a, B_S, NT, "Intel", "W790", enable_flash_pch700},
{0x8086, 0x7a04, B_S, DEP, "Intel", "Z790", enable_flash_pch700},
{0x8086, 0x7a05, B_S, NT, "Intel", "H770", enable_flash_pch700},
{0x8086, 0x7a06, B_S, NT, "Intel", "B760", enable_flash_pch700},
{0x8086, 0x7a0c, B_S, NT, "Intel", "HM770", enable_flash_pch700},
{0x8086, 0x7a0d, B_S, NT, "Intel", "WM790", enable_flash_pch700},
{0x8086, 0x7a14, B_S, NT, "Intel", "C262", enable_flash_pch700},
{0x8086, 0x7a13, B_S, NT, "Intel", "C266", enable_flash_pch700},
{0x8086, 0x7e23, B_S, DEP, "Intel", "Meteor Lake-P/M", enable_flash_mtl},
{0x8086, 0xe323, B_S, DEP, "Intel", "Panther Lake-U/H 12Xe", enable_flash_ptl},
{0x8086, 0xe423, B_S, DEP, "Intel", "Panther Lake-H 4Xe", enable_flash_ptl},