openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-28 23:43:42 +02:00
Code Issues Releases Wiki Activity

Random minor flashrom fixes

Browse Source 
- Properly escape '-' chars in manpage.
 
 - Fix typo in chipset_enable.c.

 - Drop useless 'return' in chip_readn().

 - Random other whitespace or cosmetic fixes.

Corresponding to flashrom svn r636.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Uwe Hermann 2009-06-28 23:26:37 +00:00
parent 9899cadcd8
commit 1432a60c85
7 changed files with 15 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
board_enable.c
View File

@ -393,7 +393,7 @@ static int board_asus_p5a(const char *name)
static int board_ibm_x3455(const char *name)
{
/* Set GPIO lines in the Broadcom HT-1000 southbridge. */
/* It's not a superio but it uses the same index/data port method. */
/* It's not a Super I/O but it uses the same index/data port method. */
sio_mask(0xcd6, 0x45, 0x20, 0x20);
return 0;
@ -429,7 +429,7 @@ static int board_hp_dl145_g3_enable(const char *name)
/* Set GPIO lines in the Broadcom HT-1000 southbridge. */
/* GPIO 0 reg from PM regs */
/* Set GPIO 2 and 5 high, connected to flash WP# and TBL# pins. */
/* It's not a superio but it uses the same index/data port method. */
/* It's not a Super I/O but it uses the same index/data port method. */
sio_mask(0xcd6, 0x44, 0x24, 0x24);
return 0;
@ -750,9 +750,9 @@ static uint16_t smsc_find_runtime(uint16_t sio_port, uint16_t chip_id,
uint16_t rt_port = 0;
/* Verify the chip ID. */
OUTB(0x55, sio_port); /* enable configuration */
OUTB(0x55, sio_port); /* Enable configuration. */
if (sio_read(sio_port, 0x20) != chip_id) {
fprintf(stderr, "\nERROR: SMSC super I/O not found.\n");
fprintf(stderr, "\nERROR: SMSC Super I/O not found.\n");
goto out;
}
@ -768,7 +768,7 @@ static uint16_t smsc_find_runtime(uint16_t sio_port, uint16_t chip_id,
"Super I/O runtime interface not available.\n");
}
out:
OUTB(0xaa, sio_port); /* disable configuration */
OUTB(0xaa, sio_port); /* Disable configuration. */
return rt_port;
}
@ -788,18 +788,18 @@ static int board_mitac_6513wu(const char *name)
return -1;
}
rt_port = smsc_find_runtime(0x4e, 0x54, 0xa);
rt_port = smsc_find_runtime(0x4e, 0x54 /* LPC47U33x */, 0xa);
if (rt_port == 0)
return -1;
/* Configure the GPIO pin. */
val = INB(rt_port + 0x33); /* GP30 config */
val &= ~0x87; /* output, non-inverted, GPIO, push/pull */
val &= ~0x87; /* Output, non-inverted, GPIO, push/pull */
OUTB(val, rt_port + 0x33);
/* Disable write protection. */
val = INB(rt_port + 0x4d); /* GP3 values */
val |= 0x01; /* set GP30 high */
val |= 0x01; /* Set GP30 high. */
OUTB(val, rt_port + 0x4d);
return 0;

2
chipset_enable.c
View File

@ -1059,7 +1059,7 @@ int chipset_flash_enable(void)
else
printf("OK.\n");
}
printf("This chipset supports the following protcols: %s.\n",
printf("This chipset supports the following protocols: %s.\n",
flashbuses_to_text(buses_supported));
return ret;

1
flash.h
View File

@ -597,4 +597,5 @@ void serprog_chip_writeb(uint8_t val, chipaddr addr);
uint8_t serprog_chip_readb(const chipaddr addr);
void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
void serprog_delay(int delay);
#endif /* !__FLASH_H__ */

2
flashrom.8
View File

@ -24,7 +24,7 @@ Please note that the command line interface for flashrom will change before
flashrom 1.0. Do not use flashrom in scripts or other automated tools without
checking that your flashrom version won't interpret options in a different way.
.PP
You can specify one of -E, -r, -w, -v or no operation.
You can specify one of \-E, \-r, \-w, \-v or no operation.
If no operation is specified, then all that happens
is that flash info is dumped and the flash chip is set to writable.
.TP

1
flashrom.c
View File

@ -209,7 +209,6 @@ uint32_t chip_readl(const chipaddr addr)
void chip_readn(uint8_t *buf, chipaddr addr, size_t len)
{
programmer_table[programmer].chip_readn(buf, addr, len);
return;
}
void programmer_delay(int usecs)

3
print.c
View File

@ -289,7 +289,7 @@ In general, flashing laptops is more difficult because laptops\n\n\
* often have special protection stuff which has to be handled by flashrom,\n\
* often use flash translation circuits which need drivers in flashrom.\n\n\
<div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \
background-color:#ff9f9f; align:right; border:1px solid #aabbcc;\">\n\
background-color:#ff6666; align:right; border:1px solid #000000;\">\n\
'''IMPORTANT:''' At this point we recommend to '''not''' use flashrom on \
untested laptops unless you have a means to recover from a flashing that goes \
wrong (a working backup flash chip and/or good soldering skills).\n</div>\n";
@ -649,6 +649,7 @@ void print_supported_chips_wiki(void)
"| valign=\"top\"|\n\n%s", chipcount, chip_th);
for (f = flashchips; f->name != NULL; f++, i++) {
/* Don't print "unknown XXXX SPI chip" entries. */
if (!strncmp(f->name, "unknown", 7))
continue;