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flashchips: upstream changes to GD25LQ128

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Change name of GD25LQ128 to GD25LQ128CD. This is an upstreaming of the
change from the chromium flashrom repo SHA
6c957d745f5d3dcadd1035734a5cf1b804bd0f2f (Also visible at
https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/1181175)

The rationale from that change was:

    The GD25LQ128C part is EOL. It's replacement is GD25LQ128D, but
    both chips identify in the same manner. Add GD25LQ128D to the name
    of the part so that it doesn't confused people.

Making this name consistent will simplify further merging from the
chromium fork.

Change-Id: I57804f1a33170668e029a7b08ac050d9a3bd6dbb
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34735
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This commit is contained in:
Alan Green
2019-08-06 16:10:34 +10:00
committed by Edward O'Callaghan
parent ea0c093246
commit 188127e569
2 changed files with 3 additions and 3 deletions
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4
flashchips.c
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@ -5886,10 +5886,10 @@ const struct flashchip flashchips[] = {
{
.vendor = "GigaDevice",
.name = "GD25LQ128",
.name = "GD25LQ128C/GD25LQ128D",
.bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID,
.model_id = GIGADEVICE_GD25LQ128,
.model_id = GIGADEVICE_GD25LQ128CD,
.total_size = 16384,
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */