openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 22:21:16 +02:00
Code Issues Releases Wiki Activity

internal.c: Move sio register to own object

Browse Source 
While super i/o is related to the internal programmer it
isn't actually _the_ internal programmer. Move register
logic to its own object consistent with other programmer
types.

Change-Id: I9a4c3e12bce5d22492c8d1b8f4a3f49d736dcf31
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71577
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Edward O'Callaghan
2023-01-01 14:33:51 +11:00
committed by Edward O'Callaghan
parent ec6eaff2f8
commit 195948a467
4 changed files with 44 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
internal.c
View File

@ -34,34 +34,6 @@ bool force_boardmismatch = false;
enum chipbustype internal_buses_supported = BUS_NONE;
#if defined(__i386__) || defined(__x86_64__)
void probe_superio(void)
{
probe_superio_winbond();
/* ITE probe causes SMSC LPC47N217 to power off the serial UART.
* Always probe for SMSC first, and if a SMSC Super I/O is detected
* at a given I/O port, do _not_ probe that port with the ITE probe.
* This means SMSC probing must be done before ITE probing.
*/
//probe_superio_smsc();
probe_superio_ite();
}
int superio_count = 0;
#define SUPERIO_MAX_COUNT 3
struct superio superios[SUPERIO_MAX_COUNT];
int register_superio(struct superio s)
{
if (superio_count == SUPERIO_MAX_COUNT)
return 1;
superios[superio_count++] = s;
return 0;
}
#endif
static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr)
{