mirror of
https://review.coreboot.org/flashrom.git
synced 2025-07-01 22:21:16 +02:00
it85spi: EOL support
This code was originally introduced by ITE for now exceedingly old Chromebooks. The code has had very little attention to maintain it, unlikely tested for a long time and now seems to be just a technical burden to the flashrom project. If someone is later interested it could be resurrected for reference from git history. However, it needs quite a bit of work to bring it back into maintainable order. BUG=b:156143896,b:170689483 TEST=tree builds under meson+make and unit tests pass. Change-Id: I5e8cafd73db837941c518f0e2d72d8192274fd79 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/65378 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:

committed by
Edward O'Callaghan

parent
1bb5ddde60
commit
1cea47eac2
@ -365,9 +365,6 @@ int via_init_spi(uint32_t mmio_base);
|
||||
/* amd_imc.c */
|
||||
int amd_imc_shutdown(struct pci_dev *dev);
|
||||
|
||||
/* it85spi.c */
|
||||
int it85xx_spi_init(struct superio s);
|
||||
|
||||
/* it87spi.c */
|
||||
void enter_conf_mode_ite(uint16_t port);
|
||||
void exit_conf_mode_ite(uint16_t port);
|
||||
|
Reference in New Issue
Block a user