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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 14:33:18 +02:00

spi_master: Introduce SPI_MASTER_4BA feature flag

Add a feature flag SPI_MASTER_4BA to `struct spi_master` that advertises
programmer-side support for 4-byte addresses in generic commands (and
read/write commands if the master uses the default implementations). Set
it for all masters that handle commands address-agnostic.

Don't prefer native 4BA instructions if the master doesn't support them.

Change-Id: Ife66e3fc49b9716f9c99cad957095b528135ec2c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Nico Huber
2017-11-10 20:18:23 +01:00
parent ed098d62d6
commit 1cf407b4f8
9 changed files with 30 additions and 5 deletions

View File

@ -24,6 +24,8 @@
#ifndef __PROGRAMMER_H__
#define __PROGRAMMER_H__ 1
#include <stdint.h>
#include "flash.h" /* for chipaddr and flashctx */
enum programmer {
@ -610,8 +612,12 @@ enum spi_controller {
#define MAX_DATA_UNSPECIFIED 0
#define MAX_DATA_READ_UNLIMITED 64 * 1024
#define MAX_DATA_WRITE_UNLIMITED 256
#define SPI_MASTER_4BA (1U << 0) /**< Can handle 4-byte addresses */
struct spi_master {
enum spi_controller type;
uint32_t features;
unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
@ -786,4 +792,11 @@ enum SP_PIN {
void sp_set_pin(enum SP_PIN pin, int val);
int sp_get_pin(enum SP_PIN pin);
/* spi_master feature checks */
static inline bool spi_master_4ba(const struct flashctx *const flash)
{
return flash->mst->buses_supported & BUS_SPI &&
flash->mst->spi.features & SPI_MASTER_4BA;
}
#endif /* !__PROGRAMMER_H__ */