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spi_master: Introduce SPI_MASTER_4BA feature flag
Add a feature flag SPI_MASTER_4BA to `struct spi_master` that advertises programmer-side support for 4-byte addresses in generic commands (and read/write commands if the master uses the default implementations). Set it for all masters that handle commands address-agnostic. Don't prefer native 4BA instructions if the master doesn't support them. Change-Id: Ife66e3fc49b9716f9c99cad957095b528135ec2c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22421 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
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@ -65,6 +65,7 @@ static int bitbang_spi_send_command(struct flashctx *flash,
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static const struct spi_master spi_master_bitbang = {
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.type = SPI_CONTROLLER_BITBANG,
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.features = SPI_MASTER_4BA,
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.max_data_read = MAX_DATA_READ_UNLIMITED,
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.max_data_write = MAX_DATA_WRITE_UNLIMITED,
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.command = bitbang_spi_send_command,
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@ -136,6 +136,7 @@ static int buspirate_spi_send_command_v2(struct flashctx *flash, unsigned int wr
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static struct spi_master spi_master_buspirate = {
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.type = SPI_CONTROLLER_BUSPIRATE,
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.features = SPI_MASTER_4BA,
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.max_data_read = MAX_DATA_UNSPECIFIED,
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.max_data_write = MAX_DATA_UNSPECIFIED,
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.command = NULL,
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@ -399,6 +399,7 @@ static int ch341a_spi_spi_send_command(struct flashctx *flash, unsigned int writ
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static const struct spi_master spi_master_ch341a_spi = {
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.type = SPI_CONTROLLER_CH341A_SPI,
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.features = SPI_MASTER_4BA,
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/* flashrom's current maximum is 256 B. CH341A was tested on Linux and Windows to accept atleast
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* 128 kB. Basically there should be no hard limit because transfers are broken up into USB packets
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* sent to the device and most of their payload streamed via SPI. */
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@ -111,6 +111,7 @@ static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const c
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static const struct spi_master spi_master_dummyflasher = {
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.type = SPI_CONTROLLER_DUMMY,
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.features = SPI_MASTER_4BA,
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.max_data_read = MAX_DATA_READ_UNLIMITED,
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.max_data_write = MAX_DATA_UNSPECIFIED,
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.command = dummy_spi_send_command,
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@ -159,6 +159,7 @@ static int ft2232_spi_send_command(struct flashctx *flash,
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static const struct spi_master spi_master_ft2232 = {
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.type = SPI_CONTROLLER_FT2232,
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.features = SPI_MASTER_4BA,
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.max_data_read = 64 * 1024,
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.max_data_write = 256,
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.command = ft2232_spi_send_command,
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@ -57,6 +57,7 @@ static int linux_spi_write_256(struct flashctx *flash, const uint8_t *buf,
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static const struct spi_master spi_master_linux = {
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.type = SPI_CONTROLLER_LINUX,
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.features = SPI_MASTER_4BA,
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.max_data_read = MAX_DATA_UNSPECIFIED, /* TODO? */
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.max_data_write = MAX_DATA_UNSPECIFIED, /* TODO? */
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.command = linux_spi_send_command,
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13
programmer.h
13
programmer.h
@ -24,6 +24,8 @@
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#ifndef __PROGRAMMER_H__
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#define __PROGRAMMER_H__ 1
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#include <stdint.h>
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#include "flash.h" /* for chipaddr and flashctx */
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enum programmer {
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@ -610,8 +612,12 @@ enum spi_controller {
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#define MAX_DATA_UNSPECIFIED 0
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#define MAX_DATA_READ_UNLIMITED 64 * 1024
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#define MAX_DATA_WRITE_UNLIMITED 256
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#define SPI_MASTER_4BA (1U << 0) /**< Can handle 4-byte addresses */
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struct spi_master {
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enum spi_controller type;
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uint32_t features;
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unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
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unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
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int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
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@ -786,4 +792,11 @@ enum SP_PIN {
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void sp_set_pin(enum SP_PIN pin, int val);
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int sp_get_pin(enum SP_PIN pin);
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/* spi_master feature checks */
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static inline bool spi_master_4ba(const struct flashctx *const flash)
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{
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return flash->mst->buses_supported & BUS_SPI &&
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flash->mst->spi.features & SPI_MASTER_4BA;
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}
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#endif /* !__PROGRAMMER_H__ */
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@ -305,6 +305,7 @@ static int serprog_spi_send_command(struct flashctx *flash,
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unsigned char *readarr);
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static struct spi_master spi_master_serprog = {
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.type = SPI_CONTROLLER_SERPROG,
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.features = SPI_MASTER_4BA,
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.max_data_read = MAX_DATA_READ_UNLIMITED,
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.max_data_write = MAX_DATA_WRITE_UNLIMITED,
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.command = serprog_spi_send_command,
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15
spi25.c
15
spi25.c
@ -375,6 +375,10 @@ static int spi_prepare_address(struct flashctx *const flash, uint8_t cmd_buf[],
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const bool native_4ba, const unsigned int addr)
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{
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if (native_4ba || flash->in_4ba_mode) {
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if (!spi_master_4ba(flash)) {
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msg_cwarn("4-byte address requested but master can't handle 4-byte addresses.\n");
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return -1;
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}
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cmd_buf[1] = (addr >> 24) & 0xff;
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cmd_buf[2] = (addr >> 16) & 0xff;
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cmd_buf[3] = (addr >> 8) & 0xff;
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@ -384,9 +388,10 @@ static int spi_prepare_address(struct flashctx *const flash, uint8_t cmd_buf[],
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if (flash->chip->feature_bits & FEATURE_4BA_EXT_ADDR) {
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if (spi_set_extended_address(flash, addr >> 24))
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return -1;
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} else {
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if (addr >> 24)
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return -1;
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} else if (addr >> 24) {
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msg_cerr("Can't handle 4-byte address for opcode '0x%02x'\n"
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"with this chip/programmer combination.\n", cmd_buf[0]);
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return -1;
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}
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cmd_buf[1] = (addr >> 16) & 0xff;
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cmd_buf[2] = (addr >> 8) & 0xff;
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@ -628,7 +633,7 @@ erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode)
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static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len)
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{
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const bool native_4ba = !!(flash->chip->feature_bits & FEATURE_4BA_WRITE);
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const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_WRITE && spi_master_4ba(flash);
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const uint8_t op = native_4ba ? JEDEC_BYTE_PROGRAM_4BA : JEDEC_BYTE_PROGRAM;
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return spi_write_cmd(flash, op, native_4ba, addr, bytes, len, 10);
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}
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@ -636,7 +641,7 @@ static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const ui
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int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes,
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unsigned int len)
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{
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const bool native_4ba = !!(flash->chip->feature_bits & FEATURE_4BA_READ);
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const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_READ && spi_master_4ba(flash);
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uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN] = { native_4ba ? JEDEC_READ_4BA : JEDEC_READ, };
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const int addr_len = spi_prepare_address(flash, cmd, native_4ba, address);
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