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ichspi: Add support for C740 PCH

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Clean commit 51e1d0e4b7
'Add support for Intel Emmitsburg PCH' which broke
CHIPSET_5_SERIES_IBEX_PEAK detection and which assumes C740 is the same
as C620, while its more a close relative to Intel's H570 PCH.

Based on Intel SPI Programming Guide #619386.

Test: Run on Intel ArcherCity CRB with Intel's C741 PCH
      using the 'internal' programmer.
Test: Run on BMC and accessed the SPI flash chip over
      'linux_mtd' programmer.
Change-Id: I80eebc0fcc14de9df823aceaee77870ad136f94a
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/78186
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph
2023-09-28 15:58:48 +02:00
committed by Anastasia Klimchuk
parent 95424a2b97
commit 1dd7c88f41
4 changed files with 46 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
chipset_enable.c
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@ -601,6 +601,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
break;
case CHIPSET_100_SERIES_SUNRISE_POINT:
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
case CHIPSET_500_SERIES_TIGER_POINT:
@ -712,6 +713,7 @@ static enum chipbustype enable_flash_ich_report_gcs(
break;
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_METEOR_LAKE:
boot_straps = boot_straps_pch500;
break;
@ -987,6 +989,11 @@ static int enable_flash_c620(const struct programmer_cfg *cfg, struct pci_dev *c
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_C620_SERIES_LEWISBURG);
}
static int enable_flash_c740(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_C740_SERIES_EMMITSBURG);
}
static int enable_flash_pch300(const struct programmer_cfg *cfg, struct pci_dev *const dev, const char *const name)
{
return enable_flash_pch100_or_c620(cfg, dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT);
@ -2123,7 +2130,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0xa247, B_S, NT, "Intel", "C620 Series Chipset Supersku", enable_flash_c620},
{0x8086, 0xa248, B_S, NT, "Intel", "C620 Series Chipset Supersku", enable_flash_c620},
{0x8086, 0xa249, B_S, NT, "Intel", "C620 Series Chipset Supersku", enable_flash_c620},
{0x8086, 0x1bca, B_S, NT, "Intel", "Emmitsburg Chipset SKU", enable_flash_c620},
{0x8086, 0x1bca, B_S, DEP, "Intel", "Emmitsburg Chipset SKU", enable_flash_c740},
{0x8086, 0xa2c4, B_S, NT, "Intel", "H270", enable_flash_pch100},
{0x8086, 0xa2c5, B_S, NT, "Intel", "Z270", enable_flash_pch100},
{0x8086, 0xa2c6, B_S, NT, "Intel", "Q270", enable_flash_pch100},