openwrt/flashrom
1
0
Fork 0
mirror of https://review.coreboot.org/flashrom.git synced 2025-04-30 00:13:43 +02:00
Code Issues Releases Wiki Activity

flashchips: Mark GigaDevice GD25B128B/GD25Q128B as tested

Browse Source 
Alexander reported this chip as tested using a GD25B128CPIG (same device
ID, apparently) on 2018-08-30 via the mailing list. The chip name is
updated as well.

Change-Id: I134d3816c0f02e20764ab132a01bcba9f4e93f0d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2018-09-30 17:05:18 +02:00 committed by Nico Huber
parent 2ef47f384a
commit 20657ce19c
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
flashchips.c
View File

@ -6350,7 +6350,7 @@ const struct flashchip flashchips[] = {
{ {
.vendor = "GigaDevice", .vendor = "GigaDevice",
.name = "GD25Q128B", .name = "GD25B128B/GD25Q128B",
.bustype = BUS_SPI, .bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID, .manufacture_id = GIGADEVICE_ID,
.model_id = GIGADEVICE_GD25Q128, .model_id = GIGADEVICE_GD25Q128,
@ -6358,7 +6358,7 @@ const struct flashchip flashchips[] = {
.page_size = 256, .page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED, .tested = TEST_OK_PREW,
.probe = probe_spi_rdid, .probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO, .probe_timing = TIMING_ZERO,
.block_erasers = .block_erasers =