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sbxxx: Add spispeed parameter

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Allow to set the SPI clock frequency on AMD chipsets with a programmer
parameter. If the parameter is given (and matches a possible value), the
SPI clock is set temporarily. Both registers are restored on programmer
shutdown.

Example: ./flashrom -p internal:spispeed="33 MHz" -V

Possible values for spispeed are "16.5 MHz", "22 MHz", "33 MHz", "66 MHz",
"100 MHZ" and "800 kHz" depending on the chipset generation.

Corresponding to flashrom svn r1795.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Stefan Tauner
2014-05-16 21:39:48 +00:00
parent 31402ee687
commit 21071b00e3
2 changed files with 44 additions and 0 deletions
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23
sb600spi.c
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@ -385,6 +385,29 @@ static int handle_speed(struct pci_dev *dev)
uint32_t tmp;
int8_t spispeed_idx = 3; /* Default to 16.5 MHz */
char *spispeed = extract_programmer_param("spispeed");
if (spispeed != NULL) {
if (strcasecmp(spispeed, "reserved") != 0) {
int i;
for (i = 0; i < ARRAY_SIZE(spispeeds); i++) {
if (strcasecmp(spispeeds[i].name, spispeed) == 0) {
spispeed_idx = i;
break;
}
}
/* Only Yangtze supports the second half of indices; no 66 MHz before SB8xx. */
if ((amd_gen < CHIPSET_YANGTZE && spispeed_idx > 3) ||
(amd_gen < CHIPSET_SB89XX && spispeed_idx == 0))
spispeed_idx = -1;
}
if (spispeed_idx < 0) {
msg_perr("Error: Invalid spispeed value: '%s'.\n", spispeed);
free(spispeed);
return 1;
}
free(spispeed);
}
/* See the chipset support matrix for SPI Base_Addr below for an explanation of the symbols used.
* bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson234 yangtze
* 18 rsvd <- fastReadEnable ? <- ? SpiReadMode[0]