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SPI bitbanging: request/release bus

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SPI bitbanging on devices which speak SPI natively has a dual-use
problem: We need to shut down normal SPI operations to do the bitbanging
ourselves. Once we're done, it makes a lot of sense to reenable "normal"
SPI operations again. Add request_bus/release_bus functions to struct
bitbang_spi_master.
Add a bitbang shutdown function (not used yet).
Change MCP SPI and Intel NIC SPI to use the new request/release bus
infrastructure.
Cosmetic changes to a few error messages (80 column limit).

There are multiple possible strategies for bus request/release:
- Request at the start of a SPI command, release immediately afterwards.
- Request at the start of a SPI multicommand, release once all commands
of the multicommand are done.
- Request on programmer init, release on shutdown.
Each strategy has its own advantages. For now, we will stay with the
first strategy which worked fine so far.

Corresponding to flashrom svn r1171.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Carl-Daniel Hailfinger
2010-09-15 00:17:37 +00:00
parent ec489e4ec6
commit 2822888c81
4 changed files with 53 additions and 21 deletions
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11
mcp6x_spi.c
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@ -66,18 +66,9 @@ static void mcp6x_release_spibus(void)
static void mcp6x_bitbang_set_cs(int val)
{
/* Requesting and releasing the SPI bus is handled in here to allow the
* chipset to use its own SPI engine for native reads.
*/
if (val == 0)
mcp6x_request_spibus();
mcp_gpiostate &= ~(1 << MCP6X_SPI_CS);
mcp_gpiostate |= (val << MCP6X_SPI_CS);
mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
if (val == 1)
mcp6x_release_spibus();
}
static void mcp6x_bitbang_set_sck(int val)
@ -106,6 +97,8 @@ static const struct bitbang_spi_master bitbang_spi_master_mcp6x = {
.set_sck = mcp6x_bitbang_set_sck,
.set_mosi = mcp6x_bitbang_set_mosi,
.get_miso = mcp6x_bitbang_get_miso,
.request_bus = mcp6x_request_spibus,
.release_bus = mcp6x_release_spibus,
};
int mcp6x_spi_init(int want_spi)