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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-29 07:53:44 +02:00

The AT26DF081A requires the Write Enable Latch (WLE) to be set for write/erase operations

Also bit 5 is the Erase/Program Error (EPE) bit, so has nothing to do
with the block protection. Ignore it when testing for block protections.

Corresponding to flashrom svn r1251.

Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Tested-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
This commit is contained in:
Mathias Krause 2011-01-17 07:45:54 +00:00
parent 9fbdc03d9f
commit 2c3afa34fc

View File

@ -1477,7 +1477,8 @@ struct flashchip flashchips[] = {
.model_id = ATMEL_AT26DF081A, .model_id = ATMEL_AT26DF081A,
.total_size = 1024, .total_size = 1024,
.page_size = 256, .page_size = 256,
.tested = TEST_OK_PR, .feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid, .probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO, .probe_timing = TIMING_ZERO,
.block_erasers = .block_erasers =
@ -1499,7 +1500,7 @@ struct flashchip flashchips[] = {
.block_erase = spi_block_erase_c7, .block_erase = spi_block_erase_c7,
} }
}, },
.unlock = spi_disable_blockprotect, .unlock = spi_disable_blockprotect_at25df,
.write = spi_chip_write_256, .write = spi_chip_write_256,
.read = spi_chip_read, .read = spi_chip_read,
}, },