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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-02 22:43:17 +02:00

flashchips.c: Add support for XMC new SPI flash types

Adds initial support for the follow SPI flash chips:

 XM25QU64C
 XM25QU128C
 XM25QU256C
 XM25QH64C
 XM25QH128C
 XM25QH256C

BUG=none
TEST=builds

Signed-off-by: Luke He <sixuerain@qq.com>
Change-Id: I15c51b0f1ed789bcb2cabe33bc830f8d5d916969
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48949
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
luke he
2020-12-28 18:22:21 +08:00
committed by Edward O'Callaghan
parent e3afd77087
commit 32f4cb4ffa
2 changed files with 245 additions and 1 deletions

View File

@ -792,7 +792,7 @@
* ST25P chips are SPI, first byte of device ID is memory type, second
* byte of device ID is related to log(bitsize) at least for some chips.
*/
#define ST_ID 0x20 /* ST / SGS/Thomson / Numonyx (later acquired by Micron) */
#define ST_ID 0x20 /* ST / SGS/Thomson / Numonyx / XMC(later acquired by Micron) */
#define ST_M25P05A 0x2010
#define ST_M25P05_RES 0x05
#define ST_M25P10A 0x2011
@ -811,6 +811,12 @@
#define ST_M45PE40 0x4013
#define ST_M45PE80 0x4014
#define ST_M45PE16 0x4015
#define XMC_XM25QH64C 0x4017
#define XMC_XM25QU64C 0x4117
#define XMC_XM25QH128C 0x4018
#define XMC_XM25QU128C 0x4118
#define XMC_XM25QH256C 0x4019
#define XMC_XM25QU256C 0x4119
#define ST_M25PX80 0x7114
#define ST_M25PX16 0x7115
#define ST_M25PX32 0x7116