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rayer_spi: Add pinout for Altera ByteBlasterMV

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There is a ByteBlasterII product that is only almost compatible.

Corresponding to flashrom svn r1754.

Signed-off-by: Maksim Kuleshov <mmcx@mail.ru>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: Maksim Kuleshov <mmcx@mail.ru>
Acked-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
Maksim Kuleshov 2013-10-02 01:21:57 +00:00 committed by Stefan Tauner
parent 8b1bdf19b0
commit 3647b2d5ed
2 changed files with 31 additions and 2 deletions
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7
flashrom.8.tmpl
View File

@ -759,12 +759,15 @@ parameter to specify the cable type with the
syntax where syntax where
.B model .B model
can be can be
.BR rayer " for the RayeR cable or " xilinx " for the Xilinx Parallel Cable III .BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, or " xilinx \
(DLC 5). " for the Xilinx Parallel Cable III (DLC 5)."
.sp .sp
More information about the RayeR hardware is available at More information about the RayeR hardware is available at
.nh .nh
.BR "http://rayer.ic.cz/elektro/spipgm.htm " . .BR "http://rayer.ic.cz/elektro/spipgm.htm " .
The Altera ByteBlasterMV datasheet can be obtained from
.nh
.BR "http://www.altera.co.jp/literature/ds/dsbytemv.pdf " .
The schematic of the Xilinx DLC 5 was published in The schematic of the Xilinx DLC 5 was published in
.nh .nh
.BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " . .BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " .

26
rayer_spi.c
View File

@ -70,9 +70,22 @@ static const struct rayer_pinout xilinx_dlc5 = {
.miso_bit = 4, .miso_bit = 4,
}; };
static void byteblaster_preinit(const void *);
static int byteblaster_shutdown(void *);
static const struct rayer_pinout altera_byteblastermv = {
.cs_bit = 1,
.sck_bit = 0,
.mosi_bit = 6,
.miso_bit = 7,
.preinit = byteblaster_preinit,
.shutdown = byteblaster_shutdown,
};
static const struct rayer_programmer rayer_spi_types[] = { static const struct rayer_programmer rayer_spi_types[] = {
{"rayer", NT, "RayeR SPIPGM", &rayer_spipgm}, {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm},
{"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5}, {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5},
{"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv},
{0}, {0},
}; };
@ -195,6 +208,19 @@ int rayer_spi_init(void)
return 0; return 0;
} }
static void byteblaster_preinit(const void *data){
msg_pdbg("byteblaster_preinit\n");
/* Assert #EN signal. */
OUTB(2, lpt_iobase + 2 );
}
static int byteblaster_shutdown(void *data){
msg_pdbg("byteblaster_shutdown\n");
/* De-Assert #EN signal. */
OUTB(0, lpt_iobase + 2 );
return 0;
}
#else #else
#error PCI port I/O access is not supported on this architecture yet. #error PCI port I/O access is not supported on this architecture yet.
#endif #endif