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chipset_enable: Add Apollo Lake
It works the same as 100 series PCHs and on. The SPI device is at 0:0d.2, though. Mark as BAD until `ichspi` is revised. Change-Id: I7b1ad402ba562b7b977be111f8cf61f1be50843a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30994 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -626,6 +626,7 @@ enum ich_chipset {
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CHIPSET_9_SERIES_WILDCAT_POINT_LP,
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CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) variants */
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CHIPSET_C620_SERIES_LEWISBURG,
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CHIPSET_APOLLO_LAKE,
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};
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/* ichspi.c */
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