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mirror of https://review.coreboot.org/flashrom.git synced 2025-07-01 14:11:15 +02:00

There are various reasons why a SPI command can fail

Among others, I have seen the following problems: - The SPI opcode is
not supported by the controller. ICH-style controllers exhibit this if
SPI config is locked down. - The address in in a prohibited area. This
can happen on ICH for any access (BBAR) and for writes in chipset write
protected areas. - There is no SPI controller.

Introduce separate error codes for unsupported opcode and prohibited
address.

Add the ability to adjust REMS and RES addresses to the minium supported
read address with the help of spi_get_valid_read_addr(). That function
needs to call SPI controller specific functions like reading BBAR on
ICH.

Corresponding to flashrom svn r500.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Carl-Daniel Hailfinger
2009-05-13 11:40:08 +00:00
parent b4dcb7188f
commit 3e9dbea1ce
4 changed files with 48 additions and 10 deletions

4
spi.h
View File

@ -105,4 +105,8 @@
#define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05
#define JEDEC_BYTE_PROGRAM_INSIZE 0x00
/* Error codes */
#define SPI_INVALID_OPCODE -2
#define SPI_INVALID_ADDRESS -3
#endif /* !__SPI_H__ */