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dummyflasher: enforce write protection for W25Q128FV

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Start taking bits related to write protection into account.

Also add "hwwp" parameter for dummy programmer that sets state of WP
pin (not inverted value).

TEST=use command-line interface to run WP-related commands

dummyflasher doesn't store state of the chip between runs and flashrom
allows running only one command, so testing WP in this way is limited.
However, WP options can be combined with other operations and are
executed prior to them, so certain scenarios can be checked.

List possible ranges:
    flashrom -p dummy:emulate=W25Q128FV,hwwp=yes --wp-list

Set a particular range and check status is correct:
    flashrom -p dummy:emulate=W25Q128FV,hwwp=yes \
             --wp-enable \
             --wp-range=0x00100000,0x00f00000 \
             --wp-status

Enable write protection and try erasing/writing (erasing here):
    # this fails
    flashrom -p dummy:emulate=W25Q128FV,hwwp=yes \
             --wp-range=0,0x00c00000 \
             --wp-enable \
             --erase

Write protecting empty range has no effect:
    # this succeeds
    flashrom -p dummy:emulate=W25Q128FV,hwwp=yes \
             --wp-range=0,0 \
             --wp-enable \
             --erase

Disabling WP is possible if hwwp is off:
    # this fails
    flashrom -p dummy:emulate=W25Q128FV,spi_status=0x80,hwwp=yes \
             --wp-disable
    # this succeeds
    flashrom -p dummy:emulate=W25Q128FV,spi_status=0x80,hwwp=no \
             --wp-disable

Change-Id: I9fd1417f941186391bd213bd355530143c8f04a0
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
This commit is contained in:
Sergii Dmytruk
2021-11-08 01:38:52 +02:00
committed by Anastasia Klimchuk
parent 8245b57e47
commit 3f4b62b444
2 changed files with 157 additions and 18 deletions
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15
flashrom.8.tmpl
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@ -820,6 +820,21 @@ is a hexadecimal value of up to 24 bits. For example, 0x332211 assigns 0x11 to
SR1, 0x22 to SR2 and 0x33 to SR3. Shorter value is padded to 24 bits with
zeroes on the left. See datasheet for chosen chip for details about the
registers content.
.sp
.TP
.B Write protection
.sp
Chips with emulated WP: W25Q128FV.
.sp
You can simulate state of hardware protection pin (WP) with the
.sp
.B " flashrom -p dummy:hwwp=state"
.sp
syntax where
.B state
is "yes" or "no" (default value). "yes" means active state of the pin implies
that chip is write-protected (on real hardware the pin is usually negated, but
not here).
.SS
.BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel", " nicintel_eeprom"\
, " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\