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mirror of https://review.coreboot.org/flashrom.git synced 2025-04-27 23:22:37 +02:00

realtek_mst_i2c_spi.c: Define some register names

Try to document some of the register magics with plausible
names for readability.

BUG=b:152558985,b:148745673
BRANCH=none
TEST=builds

Change-Id: I97313f6f14438e4cbfc62faa7242cf6fc271f387
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/41022
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Edward O'Callaghan 2020-05-04 13:01:54 +10:00 committed by Edward O'Callaghan
parent 753ece6bf0
commit 413d6ec673

View File

@ -31,6 +31,15 @@
#define PAGE_SIZE 256 #define PAGE_SIZE 256
#define MAX_SPI_WAIT_RETRIES 1000 #define MAX_SPI_WAIT_RETRIES 1000
#define MCU_MODE 0x6F
#define ENTER_ISP_MODE 0x80
#define MCU_DATA_PORT 0x70
#define MAP_PAGE_BYTE2 0x64
#define MAP_PAGE_BYTE1 0x65
#define MAP_PAGE_BYTE0 0x66
//opcodes //opcodes
#define OPCODE_READ 3 #define OPCODE_READ 3
#define OPCODE_WRITE 2 #define OPCODE_WRITE 2
@ -104,8 +113,7 @@ static int realtek_mst_i2c_spi_wait_command_done(int fd, unsigned int offset, in
static int realtek_mst_i2c_spi_enter_isp_mode(int fd) static int realtek_mst_i2c_spi_enter_isp_mode(int fd)
{ {
// 0xFF6F = 0x80; int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, ENTER_ISP_MODE);
int ret = realtek_mst_i2c_spi_write_register(fd, 0x6F, 0x80); // enter isp mode
// set internal osc divider register to default to speed up MCU // set internal osc divider register to default to speed up MCU
// 0x06A0 = 0x74 // 0x06A0 = 0x74
@ -226,9 +234,9 @@ static int realtek_mst_i2c_spi_send_command(const struct flashctx *flash,
static int realtek_mst_i2c_spi_map_page(int fd, uint8_t block_idx, uint8_t page_idx, uint8_t byte_idx) static int realtek_mst_i2c_spi_map_page(int fd, uint8_t block_idx, uint8_t page_idx, uint8_t byte_idx)
{ {
int ret = 0; int ret = 0;
ret |= realtek_mst_i2c_spi_write_register(fd, 0x64, block_idx); ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE2, block_idx);
ret |= realtek_mst_i2c_spi_write_register(fd, 0x65, page_idx); ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE1, page_idx);
ret |= realtek_mst_i2c_spi_write_register(fd, 0x66, byte_idx); ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE0, byte_idx);
return ret ? SPI_GENERIC_ERROR : 0; return ret ? SPI_GENERIC_ERROR : 0;
} }
@ -267,7 +275,7 @@ static int realtek_mst_i2c_spi_read(struct flashctx *flash, uint8_t *buf,
* Advance the read by a offset of one byte and continue. * Advance the read by a offset of one byte and continue.
*/ */
uint8_t dummy; uint8_t dummy;
realtek_mst_i2c_spi_read_register(fd, 0x70, &dummy); realtek_mst_i2c_spi_read_register(fd, MCU_DATA_PORT, &dummy);
for (i = 0; i < len; i += PAGE_SIZE) { for (i = 0; i < len; i += PAGE_SIZE) {
ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS, ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS,