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flashchips: change print lock status funcs for Winbond chips

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Decode status register bits for user friendly output.

Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Change-Id: I5066863b514825aee0dffe496492514ac99b6e49
Reviewed-on: https://review.coreboot.org/c/flashrom/+/75877
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
This commit is contained in:
Alexander Goncharov 2023-06-19 13:25:32 +04:00
parent 8a7f8ade46
commit 41cb46672e
1 changed files with 21 additions and 21 deletions
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42
flashchips.c
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@ -18384,7 +18384,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18433,7 +18433,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18483,7 +18483,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18531,7 +18531,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18581,7 +18581,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18712,7 +18712,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18767,7 +18767,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18822,7 +18822,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18877,7 +18877,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18924,7 +18924,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -18974,7 +18974,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19025,7 +19025,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19077,7 +19077,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19128,7 +19128,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19179,7 +19179,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19231,7 +19231,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19283,7 +19283,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP2_TB_BPL, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD, .unlock = SPI_DISABLE_BLOCKPROTECT_BP2_SRWD,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19550,7 +19550,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19692,7 +19692,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -19742,7 +19742,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, /* TODO: improve */ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,
@ -21218,7 +21218,7 @@ const struct flashchip flashchips[] = {
.block_erase = SPI_BLOCK_ERASE_C7, .block_erase = SPI_BLOCK_ERASE_C7,
} }
}, },
.printlock = SPI_PRETTYPRINT_STATUS_REGISTER_PLAIN, .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_SRWD_SEC_TB_BP2_WELWIP,
.unlock = SPI_DISABLE_BLOCKPROTECT, .unlock = SPI_DISABLE_BLOCKPROTECT,
.write = SPI_CHIP_WRITE256, .write = SPI_CHIP_WRITE256,
.read = SPI_CHIP_READ, .read = SPI_CHIP_READ,