mirror of
https://review.coreboot.org/flashrom.git
synced 2025-07-02 14:33:18 +02:00
Detect AMD Yangtze (found in Kabini and Tamesh)
The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) but the SPI interface does. Bail out in case we detect Yangtze and add infrastructure to distinguish other families too for further refactorings. Also, add ASRock IMB-A180 to the laptop whitelist and refine the IMC warning a bit. Tested on ASRock IMB-A180 with and w/o USE_YANGTZE_HEURISTICS, and by Chris Goodrich from Sage on - SB600 - SB700 - SB800 - Hudson 3 (A70M) - Kabini Corresponding to flashrom svn r1706. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
This commit is contained in:
@ -1304,7 +1304,7 @@ const struct penable chipset_enables[] = {
|
||||
{0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520},
|
||||
{0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111},
|
||||
{0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111},
|
||||
{0x1022, 0x780e, OK, "AMD", "Hudson", enable_flash_sb600},
|
||||
{0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600},
|
||||
{0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501},
|
||||
{0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496},
|
||||
{0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530},
|
||||
|
Reference in New Issue
Block a user