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Support Pm49FL004/2 Block Locking Registers

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The PMC chips understand both LPC and FWH flash commands. When in FWH mode
(MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block
Locking Registers by default lock the flash chip for write and erase - in
addition to any chipset write protection.

This patch adds unlock operations before Pm49FL004/2 write and erase, and
it includes an svn mv pm49fl004.c pm49fl00x.c

Thanks go to Nikolay for this patch.

Corresponding to flashrom svn r243 and coreboot v2 svn r3332.

Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Bari Ari <bari@onelabs.com>
This commit is contained in:
Nikolay Petukhov
2008-05-17 01:08:58 +00:00
committed by Peter Stuge
parent fc52409252
commit 4784c47a88
5 changed files with 121 additions and 58 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
flash.h
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@ -453,10 +453,10 @@ int probe_29f002(struct flashchip *flash);
int erase_29f002(struct flashchip *flash);
int write_29f002(struct flashchip *flash, uint8_t *buf);
/* pm49fl004.c */
int probe_49fl004(struct flashchip *flash);
int erase_49fl004(struct flashchip *flash);
int write_49fl004(struct flashchip *flash, uint8_t *buf);
/* pm49fl00x.c */
int probe_49fl00x(struct flashchip *flash);
int erase_49fl00x(struct flashchip *flash);
int write_49fl00x(struct flashchip *flash, uint8_t *buf);
/* sharplhf00l04.c */
int probe_lhf00l04(struct flashchip *flash);