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Code Issues Releases Wiki Activity

Various cosmetic and coding-style fixes

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- Fix incorrect whitespace, indentation, and coding style in some places.

 - Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use
   it, the comments are useless as we don't have any Doxygen markup in there.

 - Use consistent vendor name spelling as per current website (NVIDIA,
   abit, GIGABYTE).

 - Use consistent / common format for "Suited for:" lines in board_enable.c.

 - Add some missing 'void's in functions taking no arguments.

 - Add missing fullstops in sentences, remove them from non-sentences (lists).

Corresponding to flashrom svn r1134.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
This commit is contained in:
Uwe Hermann 2010-08-08 17:01:18 +00:00
parent 7507de451b
commit 48ec1b17d8
7 changed files with 306 additions and 268 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

520
board_enable.c
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File diff suppressed because it is too large Load Diff

6
chipset_enable.c
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@ -609,7 +609,7 @@ static int enable_flash_cs5530(struct pci_dev *dev, const char *name)
return 0; return 0;
} }
/** /*
* Geode systems write protect the BIOS via RCONFs (cache settings similar * Geode systems write protect the BIOS via RCONFs (cache settings similar
* to MTRRs). To unlock, change MSR 0x1808 top byte to 0x22. * to MTRRs). To unlock, change MSR 0x1808 top byte to 0x22.
* *
@ -868,7 +868,7 @@ static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
return 0; return 0;
} }
/** /*
* The MCP6x/MCP7x code is based on cleanroom reverse engineering. * The MCP6x/MCP7x code is based on cleanroom reverse engineering.
* It is assumed that LPC chips need the MCP55 code and SPI chips need the * It is assumed that LPC chips need the MCP55 code and SPI chips need the
* code provided in enable_flash_mcp6x_7x_common. * code provided in enable_flash_mcp6x_7x_common.
@ -945,7 +945,7 @@ static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
return 0; return 0;
} }
/** /*
* Usually on the x86 architectures (and on other PC-like platforms like some * Usually on the x86 architectures (and on other PC-like platforms like some
* Alphas or Itanium) the system flash is mapped right below 4G. On the AMD * Alphas or Itanium) the system flash is mapped right below 4G. On the AMD
* Elan SC520 only a small piece of the system flash is mapped there, but the * Elan SC520 only a small piece of the system flash is mapped there, but the

2
flashrom.8
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@ -351,7 +351,7 @@ type and interface/port it should support. For that you have to use the
syntax where syntax where
.B model .B model
can be any of can be any of
.BR 2232H ", "JTAGkey ", or " 4232H .BR 2232H ", " JTAGkey ", or " 4232H
and and
.B interface .B interface
can be any of can be any of

6
flashrom.c
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@ -98,7 +98,7 @@ static char *programmer_param = NULL;
/* Supported buses for the current programmer. */ /* Supported buses for the current programmer. */
enum chipbustype buses_supported; enum chipbustype buses_supported;
/** /*
* Programmers supporting multiple buses can have differing size limits on * Programmers supporting multiple buses can have differing size limits on
* each bus. Store the limits for each bus in a common struct. * each bus. Store the limits for each bus in a common struct.
*/ */
@ -685,7 +685,7 @@ int check_erased_range(struct flashchip *flash, int start, int len)
return ret; return ret;
} }
/** /*
* @cmpbuf buffer to compare against, cmpbuf[0] is expected to match the * @cmpbuf buffer to compare against, cmpbuf[0] is expected to match the
flash content at location start flash content at location start
* @start offset to the base address of the flash chip * @start offset to the base address of the flash chip
@ -765,7 +765,7 @@ out_free:
return ret; return ret;
} }
/** /*
* Check if the buffer @have can be programmed to the content of @want without * Check if the buffer @have can be programmed to the content of @want without
* erasing. This is only possible if all chunks of size @gran are either kept * erasing. This is only possible if all chunks of size @gran are either kept
* as-is or changed from an all-ones state to any other state. * as-is or changed from an all-ones state to any other state.

4
mcp6x_spi.c
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@ -17,7 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
/* Driver for the Nvidia MCP6x/MCP7x MCP6X_SPI controller. /* Driver for the NVIDIA MCP6x/MCP7x MCP6X_SPI controller.
* Based on clean room reverse engineered docs from * Based on clean room reverse engineered docs from
* http://www.flashrom.org/pipermail/flashrom/2009-December/001180.html * http://www.flashrom.org/pipermail/flashrom/2009-December/001180.html
* created by Michael Karcher. * created by Michael Karcher.
@ -165,7 +165,7 @@ int mcp6x_spi_init(int want_spi)
return 0; return 0;
} }
/* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */
mcp6x_spibar = physmap("Nvidia MCP6x SPI", mcp6x_spibaraddr, 0x544); mcp6x_spibar = physmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544);
#if 0 #if 0
/* FIXME: Run the physunmap in a shutdown function. */ /* FIXME: Run the physunmap in a shutdown function. */

22
print.c
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@ -257,8 +257,8 @@ void print_supported(void)
#endif #endif
#if CONFIG_FT2232_SPI+CONFIG_DEDIPROG >= 1 #if CONFIG_FT2232_SPI+CONFIG_DEDIPROG >= 1
printf("\nSupported USB devices flashrom can use " printf("\nSupported USB devices flashrom can use "
"as programmer:\n\n"); "as programmer:\n\n");
#endif #endif
#if CONFIG_FT2232_SPI == 1 #if CONFIG_FT2232_SPI == 1
@ -278,15 +278,15 @@ void print_supported(void)
const struct board_info boards_known[] = { const struct board_info boards_known[] = {
#if defined(__i386__) || defined(__x86_64__) #if defined(__i386__) || defined(__x86_64__)
B("A-Trend", "ATC-6220", 1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL), B("A-Trend", "ATC-6220", 1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
B("Abit", "AX8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL), B("abit", "AX8", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
B("Abit", "Fatal1ty F-I90HD", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL), B("abit", "Fatal1ty F-I90HD", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
B("Abit", "IC7", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL), B("abit", "IC7", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL),
B("Abit", "IP35", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL), B("abit", "IP35", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL),
B("Abit", "IP35 Pro", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro", NULL), B("abit", "IP35 Pro", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro", NULL),
B("Abit", "IS-10", 0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", NULL), B("abit", "IS-10", 0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", NULL),
B("Abit", "NF-M2 nView", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL), B("abit", "NF-M2 nView", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL),
B("Abit", "NF7-S", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL), B("abit", "NF7-S", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL),
B("Abit", "VT6X4", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL), B("abit", "VT6X4", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL),
B("Acorp", "6A815EPD", 1, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL), B("Acorp", "6A815EPD", 1, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL),
B("Advantech", "PCM-5820", 1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL), B("Advantech", "PCM-5820", 1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
B("agami", "Aruma", 1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL), B("agami", "Aruma", 1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),

10
programmer.h
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@ -399,11 +399,11 @@ extern const struct pcidev_status ata_hpt[];
/* ft2232_spi.c */ /* ft2232_spi.c */
#if CONFIG_FT2232_SPI == 1 #if CONFIG_FT2232_SPI == 1
struct usbdev_status { struct usbdev_status {
uint16_t vendor_id; uint16_t vendor_id;
uint16_t device_id; uint16_t device_id;
int status; int status;
const char *vendor_name; const char *vendor_name;
const char *device_name; const char *device_name;
}; };
int ft2232_spi_init(void); int ft2232_spi_init(void);
int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);