hwaccess: move x86 port I/O related code into own files

Allow port I/O related code to be compiled independent from memory
mapping functionality. This enables for a better selection of needed
hardware access types.

Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Makefile

@@ -804,23 +804,22 @@ ifneq ($(NEED_RAW_ACCESS), )
 FEATURE_CFLAGS += -D'NEED_RAW_ACCESS=1'
 PROGRAMMER_OBJS += physmap.o hwaccess.o
 
-ifeq ($(TARGET_OS), NetBSD)
 ifeq ($(ARCH), x86)
+FEATURE_CFLAGS += -D'__FLASHROM_HAVE_OUTB__=1'
+PROGRAMMER_OBJS += hwaccess_x86_io.o
+
+ifeq ($(TARGET_OS), NetBSD)
 PCILIBS += -l$(shell uname -p)
 endif
-else
 ifeq ($(TARGET_OS), OpenBSD)
-ifeq ($(ARCH), x86)
 PCILIBS += -l$(shell uname -m)
 endif
-else
+endif
+
 ifeq ($(TARGET_OS), Darwin)
 # DirectHW framework can be found in the DirectHW library.
 PCILIBS += -framework IOKit -framework DirectHW
 endif
-endif
-endif
-
 endif
 
 USE_LIBUSB1 := $(if $(call filter_deps,$(DEPENDS_ON_LIBUSB1)),yes,no)

amd_imc.c

@@ -17,7 +17,7 @@
 
 #include "flash.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "spi.h"
 #include "platform/pci.h"
 

atahpt.c

@@ -18,7 +18,7 @@
 #include <string.h>
 #include "flash.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define BIOS_ROM_ADDR		0x90

atapromise.c

@@ -19,6 +19,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define MAX_ROM_DECODE (32 * 1024)

atavia.c

@@ -20,7 +20,7 @@
 #include <string.h>
 #include "flash.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_VIA	0x1106

board_enable.c

@@ -26,6 +26,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #if defined(__i386__) || defined(__x86_64__)

chipset_enable.c

@@ -34,6 +34,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define NOT_DONE_YET 1

drkaiser.c

@@ -18,6 +18,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_DRKAISER		0x1803

gfxnvidia.c

@@ -19,6 +19,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_NVIDIA	0x10de

hwaccess.c

@@ -25,17 +25,8 @@
 #include <fcntl.h>
 #endif
 #include "flash.h"
-#include "programmer.h"
 #include "hwaccess.h"
 
-#if USE_IOPERM
-#include <sys/io.h>
-#endif
-
-#if (defined (__i386__) || defined (__x86_64__) || defined(__amd64__)) && USE_DEV_IO
-int io_fd;
-#endif
-
 /* Prevent reordering and/or merging of reads/writes to hardware.
  * Such reordering and/or merging would break device accesses which depend on the exact access order.
  */
@@ -70,59 +61,6 @@ static inline void sync_primitive(void)
 #endif
 }
 
-#if (defined (__i386__) || defined (__x86_64__) || defined(__amd64__)) && !(defined(__DJGPP__) || defined(__LIBPAYLOAD__))
-static int release_io_perms(void *p)
-{
-#if defined (__sun)
-	sysi86(SI86V86, V86SC_IOPL, 0);
-#elif USE_DEV_IO
-	close(io_fd);
-#elif USE_IOPERM
-	ioperm(0, 65536, 0);
-#elif USE_IOPL
-	iopl(0);
-#endif
-	return 0;
-}
-
-/* Get I/O permissions with automatic permission release on shutdown. */
-int rget_io_perms(void)
-{
-	#if defined (__sun)
-	if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
-#elif USE_DEV_IO
-	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
-#elif USE_IOPERM
-	if (ioperm(0, 65536, 1) != 0) {
-#elif USE_IOPL
-	if (iopl(3) != 0) {
-#endif
-		msg_perr("ERROR: Could not get I/O privileges (%s).\n", strerror(errno));
-		msg_perr("You need to be root.\n");
-#if defined (__OpenBSD__)
-		msg_perr("If you are root already please set securelevel=-1 in /etc/rc.securelevel and\n"
-			 "reboot, or reboot into single user mode.\n");
-#elif defined(__NetBSD__)
-		msg_perr("If you are root already please reboot into single user mode or make sure\n"
-			 "that your kernel configuration has the option INSECURE enabled.\n");
-#endif
-		return 1;
-	} else {
-		register_shutdown(release_io_perms, NULL);
-	}
-	return 0;
-}
-
-#else
-
-/* DJGPP and libpayload environments have full PCI port I/O permissions by default. */
-/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */
-int rget_io_perms(void)
-{
-	return 0;
-}
-#endif
-
 void mmio_writeb(uint8_t val, void *addr)
 {
 	*(volatile uint8_t *) addr = val;

hwaccess.h

@@ -124,8 +124,6 @@ cpu_to_be(64)
 
 #if NEED_RAW_ACCESS == 1 && (defined (__i386__) || defined (__x86_64__) || defined(__amd64__))
 
-#include "hwaccess_x86_io.h"
-
 #if !(defined(__MACH__) && defined(__APPLE__)) && !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__)
 typedef struct { uint32_t hi, lo; } msr_t;
 msr_t rdmsr(int addr);

hwaccess_x86_io.c

@@ -0,0 +1,87 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <errno.h>
+#include <string.h>
+#if !defined (__DJGPP__) && !defined(__LIBPAYLOAD__)
+/* No file access needed/possible to get hardware access permissions. */
+#include <unistd.h>
+#include <fcntl.h>
+#endif
+
+#include "hwaccess_x86_io.h"
+#include "flash.h"
+
+#if USE_IOPERM
+#include <sys/io.h>
+#endif
+
+#if USE_DEV_IO
+int io_fd;
+#endif
+
+#if !(defined(__DJGPP__) || defined(__LIBPAYLOAD__))
+static int release_io_perms(void *p)
+{
+#if defined (__sun)
+	sysi86(SI86V86, V86SC_IOPL, 0);
+#elif USE_DEV_IO
+	close(io_fd);
+#elif USE_IOPERM
+	ioperm(0, 65536, 0);
+#elif USE_IOPL
+	iopl(0);
+#endif
+	return 0;
+}
+
+/* Get I/O permissions with automatic permission release on shutdown. */
+int rget_io_perms(void)
+{
+	#if defined (__sun)
+	if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
+#elif USE_DEV_IO
+	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
+#elif USE_IOPERM
+	if (ioperm(0, 65536, 1) != 0) {
+#elif USE_IOPL
+	if (iopl(3) != 0) {
+#endif
+		msg_perr("ERROR: Could not get I/O privileges (%s).\n", strerror(errno));
+		msg_perr("You need to be root.\n");
+#if defined (__OpenBSD__)
+		msg_perr("If you are root already please set securelevel=-1 in /etc/rc.securelevel and\n"
+			 "reboot, or reboot into single user mode.\n");
+#elif defined(__NetBSD__)
+		msg_perr("If you are root already please reboot into single user mode or make sure\n"
+			 "that your kernel configuration has the option INSECURE enabled.\n");
+#endif
+		return 1;
+	} else {
+		register_shutdown(release_io_perms, NULL);
+	}
+	return 0;
+}
+
+#else
+
+/* DJGPP and libpayload environments have full PCI port I/O permissions by default. */
+/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */
+int rget_io_perms(void)
+{
+	return 0;
+}
+#endif

hwaccess_x86_io.h

@@ -29,8 +29,6 @@
 #include <sys/io.h>
 #endif
 
-#define __FLASHROM_HAVE_OUTB__ 1
-
 /* for iopl and outb under Solaris */
 #if defined (__sun)
 #include <sys/sysi86.h>
@@ -38,6 +36,8 @@
 #include <asm/sunddi.h>
 #endif
 
+int rget_io_perms(void);
+
 /* Clarification about OUTB/OUTW/OUTL argument order:
  * OUT[BWL](val, port)
  */

internal.c

@@ -20,6 +20,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 int is_laptop = 0;

it8212.c

@@ -18,6 +18,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 static uint8_t *it8212_bar = NULL;

it85spi.c

@@ -26,7 +26,7 @@
 #include "flash.h"
 #include "spi.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 
 #define MAX_TIMEOUT 100000
 #define MAX_TRY 5

it87spi.c

@@ -26,6 +26,7 @@
 #include "chipdrivers.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "spi.h"
 
 #define ITE_SUPERIO_PORT1	0x2e

meson.build

@@ -347,8 +347,10 @@ endif
 # raw memory, MSR or PCI port I/O access
 if need_raw_access
   srcs += 'hwaccess.c'
+  srcs += 'hwaccess_x86_io.c'
   srcs += 'physmap.c'
   cargs += '-DNEED_RAW_ACCESS=1'
+  cargs += '-D__FLASHROM_HAVE_OUTB__=1'
 endif
 
 # raw serial IO

nic3com.c

@@ -17,7 +17,7 @@
 #include <stdlib.h>
 #include "flash.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define BIOS_ROM_ADDR		0x04

nicintel.c

@@ -19,6 +19,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 static uint8_t *nicintel_bar;

nicintel_eeprom.c

@@ -35,6 +35,7 @@
 #include "spi.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_INTEL 0x8086

nicintel_spi.c

@@ -35,6 +35,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_INTEL 0x8086

nicnatsemi.c

@@ -17,7 +17,7 @@
 #include <stdlib.h>
 #include "flash.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_NATSEMI	0x100b

nicrealtek.c

@@ -17,7 +17,7 @@
 #include <stdlib.h>
 #include "flash.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_REALTEK	0x10ec

ogp_spi.c

@@ -19,6 +19,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_OGP 0x1227

programmer.h

@@ -271,7 +271,6 @@ struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
 struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
 			      uint16_t card_vendor, uint16_t card_device);
 #endif
-int rget_io_perms(void);
 #if CONFIG_INTERNAL == 1
 extern int is_laptop;
 extern int laptop_ok;

rayer_spi.c

@@ -28,7 +28,7 @@
 #include <string.h>
 #include "flash.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 
 /* We have two sets of pins, out and in. The numbers for both sets are
  * independent and are bitshift values, not real pin numbers.

satamv.c

@@ -20,6 +20,7 @@
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 static uint8_t *mv_bar;

satasii.c

@@ -18,6 +18,7 @@
 
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "platform/pci.h"
 
 #define PCI_VENDOR_ID_SII	0x1095

tests/hwaccess_x86_io_unittest.h

@@ -39,6 +39,8 @@
 
 #include <stdint.h>
 
+int rget_io_perms(void);
+
 /*
  * Dummy implementation of iopl from sys/io.h.
  * sys/io.h by itself is platform-specific, so instead of including

wbsio_spi.c

@@ -20,6 +20,7 @@
 #include "chipdrivers.h"
 #include "programmer.h"
 #include "hwaccess.h"
+#include "hwaccess_x86_io.h"
 #include "spi.h"
 
 #define WBSIO_PORT1	0x2e