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ichspi.c: Make ich_set_bbar() parameteric on ich_generation
Work towards dropping ich_generation global usage and make the ich_set_bbar() function pure. Change-Id: I6da6dccb413cbafa2fbaca213574f22c7a258139 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/43500 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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ichspi.c
10
ichspi.c
@ -714,10 +714,10 @@ static int ich_missing_opcodes(void)
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* Try to set BBAR (BIOS Base Address Register), but read back the value in case
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* it didn't stick.
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*/
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static void ich_set_bbar(uint32_t min_addr)
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static void ich_set_bbar(uint32_t min_addr, enum ich_chipset ich_gen)
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{
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int bbar_off;
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switch (ich_generation) {
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switch (ich_gen) {
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case CHIPSET_ICH7:
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case CHIPSET_TUNNEL_CREEK:
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case CHIPSET_CENTERTON:
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@ -1811,7 +1811,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
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ichspi_lock = 1;
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}
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ich_init_opcodes(ich_gen);
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ich_set_bbar(0);
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ich_set_bbar(0, ich_gen);
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register_spi_master(&spi_master_ich7);
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break;
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case CHIPSET_ICH8:
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@ -1946,7 +1946,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
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default:
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ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR);
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msg_pdbg("0x%x: 0x%08x (BBAR)\n", ICH9_REG_BBAR, ichspi_bbar);
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ich_set_bbar(0);
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ich_set_bbar(0, ich_gen);
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break;
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}
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@ -2099,7 +2099,7 @@ int via_init_spi(uint32_t mmio_base)
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ichspi_lock = 1;
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}
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ich_set_bbar(0);
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ich_set_bbar(0, ich_generation);
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ich_init_opcodes(ich_generation);
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return 0;
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