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chipset_enable.c: Add CMP-H IDs

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This patch adds CMP-H support. They are HM470, WM490, QM480,
W480, H470, Z490 and Q470.

TEST=build flashrom and run on CML-S with CMP-H
     flashrom -p internal -w ./coreboot.rom
     reboot and check the code is flashed correctly

Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f
Reviewed-on: https://review.coreboot.org/c/flashrom/+/37677
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Gaggery Tsai 2019-12-12 11:52:03 -08:00 committed by Nico Huber
parent d6c7f21a38
commit 4fc21c0609
1 changed files with 7 additions and 0 deletions
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7
chipset_enable.c
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@ -2085,6 +2085,13 @@ const struct penable chipset_enables[] = {
{0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300}, {0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300},
{0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300}, {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300},
{0x8086, 0x3482, B_S, DEP, "Intel", "Ice Lake U Premium", enable_flash_pch300}, {0x8086, 0x3482, B_S, DEP, "Intel", "Ice Lake U Premium", enable_flash_pch300},
{0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch400},
{0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch400},
{0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch400},
{0x8086, 0x068c, B_S, NT, "Intel", "QM480", enable_flash_pch400},
{0x8086, 0x068d, B_S, NT, "Intel", "HM470", enable_flash_pch400},
{0x8086, 0x068e, B_S, NT, "Intel", "WM490", enable_flash_pch400},
{0x8086, 0x0697, B_S, NT, "Intel", "W480", enable_flash_pch400},
#endif #endif
{0}, {0},
}; };