flashchips: Add XMC XM25QH64A

Based off of the now-abandoned GitHub pull request here:
https://github.com/flashrom/flashrom/pull/239

Datasheet:
https://www.micros.com.pl/mediaserver/PFXM25QH64AHIG_0001.pdf

This commit applies the changes on top of the refactor where the flash
chip declarations were separated by vendor.

Change-Id: I5b11e30f0a5357a6cbb32ddb93f450de5364c60b
Co-authored-by: Ayushman Dutta <ayushman999@gmail.com>
Co-authored-by: "aiyion.prime" <git@aiyionpri.me>
Co-authored-by: Eric Park <me@ericswpark.com>
Signed-off-by: Eric Park <me@ericswpark.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/86990
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

flashchips/xmc.c

@@ -322,6 +322,47 @@
 		.voltage	= {1650, 1950},
 	},
 
+	{
+		.vendor		= "XMC",
+		.name		= "XM25QH64A",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= ST_ID,
+		.model_id	= XMC_XM25QH64A,
+		.total_size	= 8192,
+		.page_size	= 256,
+		/* supports SFDP */
+		/* OTP: 512B total; enter 0x3A */
+		/* QPI enable 0x38, disable 0xFF */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
+		.tested		= TEST_OK_PREW,
+		.probe		= PROBE_SPI_RDID,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 2048} },
+				.block_erase = SPI_BLOCK_ERASE_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 256} },
+				.block_erase = SPI_BLOCK_ERASE_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 128} },
+				.block_erase = SPI_BLOCK_ERASE_D8,
+			}, {
+				.eraseblocks = { { 8192 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_60,
+			}, {
+				.eraseblocks = { { 8192 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_C7,
+			}
+		},
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit6 is quad enable */
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
+		.write		= SPI_CHIP_WRITE256,
+		.read		= SPI_CHIP_READ,
+		.voltage	= {2700, 3600},
+	},
+
 	{
 		.vendor		= "XMC",
 		.name		= "XM25QH128A",